diff --git a/hw/arm-misc.h b/hw/arm-misc.h index f8a747289b..af403a159a 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -11,13 +11,16 @@ #ifndef ARM_MISC_H #define ARM_MISC_H 1 +#include "memory.h" + /* The CPU is also modeled as an interrupt controller. */ #define ARM_PIC_CPU_IRQ 0 #define ARM_PIC_CPU_FIQ 1 qemu_irq *arm_pic_init_cpu(CPUState *env); /* armv7m.c */ -qemu_irq *armv7m_init(int flash_size, int sram_size, +qemu_irq *armv7m_init(MemoryRegion *address_space_mem, + int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */ diff --git a/hw/armv7m.c b/hw/armv7m.c index a932f16a44..28d41b82a6 100644 --- a/hw/armv7m.c +++ b/hw/armv7m.c @@ -156,7 +156,8 @@ static void armv7m_reset(void *opaque) flash_size and sram_size are in kb. Returns the NVIC array. */ -qemu_irq *armv7m_init(int flash_size, int sram_size, +qemu_irq *armv7m_init(MemoryRegion *address_space_mem, + int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model) { CPUState *env; @@ -169,6 +170,9 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, uint64_t lowaddr; int i; int big_endian; + MemoryRegion *sram = g_new(MemoryRegion, 1); + MemoryRegion *flash = g_new(MemoryRegion, 1); + MemoryRegion *hack = g_new(MemoryRegion, 1); flash_size *= 1024; sram_size *= 1024; @@ -194,12 +198,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, #endif /* Flash programming is done via the SCU, so pretend it is ROM. */ - cpu_register_physical_memory(0, flash_size, - qemu_ram_alloc(NULL, "armv7m.flash", - flash_size) | IO_MEM_ROM); - cpu_register_physical_memory(0x20000000, sram_size, - qemu_ram_alloc(NULL, "armv7m.sram", - sram_size) | IO_MEM_RAM); + memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size); + memory_region_set_readonly(flash, true); + memory_region_add_subregion(address_space_mem, 0, flash); + memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size); + memory_region_add_subregion(address_space_mem, 0x20000000, sram); armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); @@ -232,9 +235,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, /* Hack to map an additional page of ram at the top of the address space. This stops qemu complaining about executing code outside RAM when returning from an exception. */ - cpu_register_physical_memory(0xfffff000, 0x1000, - qemu_ram_alloc(NULL, "armv7m.hack", - 0x1000) | IO_MEM_RAM); + memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000); + memory_region_add_subregion(address_space_mem, 0xfffff000, hack); qemu_register_reset(armv7m_reset, env); return pic; diff --git a/hw/stellaris.c b/hw/stellaris.c index 9b0db7f511..2bf1c235dc 100644 --- a/hw/stellaris.c +++ b/hw/stellaris.c @@ -15,6 +15,7 @@ #include "i2c.h" #include "net.h" #include "boards.h" +#include "exec-memory.h" #define GPIO_A 0 #define GPIO_B 1 @@ -1260,6 +1261,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, 0x40024000, 0x40025000, 0x40026000}; static const int gpio_irq[7] = {0, 1, 2, 3, 4, 30, 31}; + MemoryRegion *address_space_mem = get_system_memory(); qemu_irq *pic; DeviceState *gpio_dev[7]; qemu_irq gpio_in[7][8]; @@ -1274,7 +1276,8 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, flash_size = ((board->dc0 & 0xffff) + 1) << 1; sram_size = (board->dc0 >> 18) + 1; - pic = armv7m_init(flash_size, sram_size, kernel_filename, cpu_model); + pic = armv7m_init(address_space_mem, + flash_size, sram_size, kernel_filename, cpu_model); if (board->dc1 & (1 << 16)) { dev = sysbus_create_varargs("stellaris-adc", 0x40038000,