mirror of https://github.com/proxmox/mirror_qemu
hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
RISC-V should also generate the SPCR in a manner similar to ARM. Therefore, instead of replicating the code, relocate this function to the common AML build. Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240129021440.17640-2-jeeheng.sia@starfivetech.com> [ Changes by AF: - Add missing Language SPCR entry ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>master
Sia Jee Heng
Alistair Francis
parent
3011c1dd9c
commit
7dd0b070fa
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@ -1994,6 +1994,59 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
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}
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}
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void build_spcr(GArray *table_data, BIOSLinker *linker,
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const AcpiSpcrData *f, const uint8_t rev,
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const char *oem_id, const char *oem_table_id)
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{
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AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
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.oem_table_id = oem_table_id };
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acpi_table_begin(&table, table_data);
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/* Interface type */
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build_append_int_noprefix(table_data, f->interface_type, 1);
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/* Reserved */
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build_append_int_noprefix(table_data, 0, 3);
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/* Base Address */
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build_append_gas(table_data, f->base_addr.id, f->base_addr.width,
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f->base_addr.offset, f->base_addr.size,
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f->base_addr.addr);
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/* Interrupt type */
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build_append_int_noprefix(table_data, f->interrupt_type, 1);
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/* IRQ */
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build_append_int_noprefix(table_data, f->pc_interrupt, 1);
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/* Global System Interrupt */
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build_append_int_noprefix(table_data, f->interrupt, 4);
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/* Baud Rate */
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build_append_int_noprefix(table_data, f->baud_rate, 1);
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/* Parity */
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build_append_int_noprefix(table_data, f->parity, 1);
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/* Stop Bits */
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build_append_int_noprefix(table_data, f->stop_bits, 1);
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/* Flow Control */
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build_append_int_noprefix(table_data, f->flow_control, 1);
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/* Language */
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build_append_int_noprefix(table_data, f->language, 1);
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/* Terminal Type */
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build_append_int_noprefix(table_data, f->terminal_type, 1);
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/* PCI Device ID */
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build_append_int_noprefix(table_data, f->pci_device_id, 2);
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/* PCI Vendor ID */
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build_append_int_noprefix(table_data, f->pci_vendor_id, 2);
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/* PCI Bus Number */
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build_append_int_noprefix(table_data, f->pci_bus, 1);
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/* PCI Device Number */
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build_append_int_noprefix(table_data, f->pci_device, 1);
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/* PCI Function Number */
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build_append_int_noprefix(table_data, f->pci_function, 1);
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/* PCI Flags */
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build_append_int_noprefix(table_data, f->pci_flags, 4);
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/* PCI Segment */
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build_append_int_noprefix(table_data, f->pci_segment, 1);
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/* Reserved */
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build_append_int_noprefix(table_data, 0, 4);
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acpi_table_end(linker, &table);
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}
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/*
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* ACPI spec, Revision 6.3
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* 5.2.29 Processor Properties Topology Table (PPTT)
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@ -431,48 +431,34 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
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* Rev: 1.07
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*/
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static void
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build_spcr(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
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spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
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{
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AcpiTable table = { .sig = "SPCR", .rev = 2, .oem_id = vms->oem_id,
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.oem_table_id = vms->oem_table_id };
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AcpiSpcrData serial = {
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.interface_type = 3, /* ARM PL011 UART */
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.base_addr.id = AML_AS_SYSTEM_MEMORY,
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.base_addr.width = 32,
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.base_addr.offset = 0,
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.base_addr.size = 3,
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.base_addr.addr = vms->memmap[VIRT_UART].base,
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.interrupt_type = (1 << 3),/* Bit[3] ARMH GIC interrupt*/
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.pc_interrupt = 0, /* IRQ */
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.interrupt = (vms->irqmap[VIRT_UART] + ARM_SPI_BASE),
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.baud_rate = 3, /* 9600 */
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.parity = 0, /* No Parity */
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.stop_bits = 1, /* 1 Stop bit */
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.flow_control = 1 << 1, /* RTS/CTS hardware flow control */
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.terminal_type = 0, /* VT100 */
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.language = 0, /* Language */
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.pci_device_id = 0xffff, /* not a PCI device*/
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.pci_vendor_id = 0xffff, /* not a PCI device*/
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.pci_bus = 0,
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.pci_device = 0,
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.pci_function = 0,
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.pci_flags = 0,
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.pci_segment = 0,
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};
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acpi_table_begin(&table, table_data);
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/* Interface Type */
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build_append_int_noprefix(table_data, 3, 1); /* ARM PL011 UART */
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build_append_int_noprefix(table_data, 0, 3); /* Reserved */
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/* Base Address */
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build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 32, 0, 3,
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vms->memmap[VIRT_UART].base);
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/* Interrupt Type */
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build_append_int_noprefix(table_data,
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(1 << 3) /* Bit[3] ARMH GIC interrupt */, 1);
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build_append_int_noprefix(table_data, 0, 1); /* IRQ */
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/* Global System Interrupt */
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build_append_int_noprefix(table_data,
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vms->irqmap[VIRT_UART] + ARM_SPI_BASE, 4);
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build_append_int_noprefix(table_data, 3 /* 9600 */, 1); /* Baud Rate */
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build_append_int_noprefix(table_data, 0 /* No Parity */, 1); /* Parity */
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/* Stop Bits */
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build_append_int_noprefix(table_data, 1 /* 1 Stop bit */, 1);
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/* Flow Control */
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build_append_int_noprefix(table_data,
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(1 << 1) /* RTS/CTS hardware flow control */, 1);
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/* Terminal Type */
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build_append_int_noprefix(table_data, 0 /* VT100 */, 1);
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build_append_int_noprefix(table_data, 0, 1); /* Language */
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/* PCI Device ID */
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build_append_int_noprefix(table_data, 0xffff /* not a PCI device*/, 2);
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/* PCI Vendor ID */
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build_append_int_noprefix(table_data, 0xffff /* not a PCI device*/, 2);
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build_append_int_noprefix(table_data, 0, 1); /* PCI Bus Number */
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build_append_int_noprefix(table_data, 0, 1); /* PCI Device Number */
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build_append_int_noprefix(table_data, 0, 1); /* PCI Function Number */
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build_append_int_noprefix(table_data, 0, 4); /* PCI Flags */
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build_append_int_noprefix(table_data, 0, 1); /* PCI Segment */
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build_append_int_noprefix(table_data, 0, 4); /* Reserved */
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acpi_table_end(linker, &table);
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build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
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}
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/*
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@ -938,7 +924,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables)
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}
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acpi_add_table(table_offsets, tables_blob);
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build_spcr(tables_blob, tables->linker, vms);
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spcr_setup(tables_blob, tables->linker, vms);
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acpi_add_table(table_offsets, tables_blob);
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build_dbg2(tables_blob, tables->linker, vms);
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@ -90,6 +90,39 @@ typedef struct AcpiFadtData {
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unsigned *xdsdt_tbl_offset;
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} AcpiFadtData;
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typedef struct AcpiGas {
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uint8_t id; /* Address space ID */
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uint8_t width; /* Register bit width */
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uint8_t offset; /* Register bit offset */
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uint8_t size; /* Access size */
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uint64_t addr; /* Address */
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} AcpiGas;
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/* SPCR (Serial Port Console Redirection table) */
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typedef struct AcpiSpcrData {
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uint8_t interface_type;
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uint8_t reserved[3];
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struct AcpiGas base_addr;
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uint8_t interrupt_type;
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uint8_t pc_interrupt;
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uint32_t interrupt; /* Global system interrupt */
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uint8_t baud_rate;
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uint8_t parity;
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uint8_t stop_bits;
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uint8_t flow_control;
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uint8_t terminal_type;
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uint8_t language;
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uint8_t reserved1;
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uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
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uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
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uint8_t pci_bus;
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uint8_t pci_device;
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uint8_t pci_function;
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uint32_t pci_flags;
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uint8_t pci_segment;
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uint32_t reserved2;
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} AcpiSpcrData;
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#define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
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#define ACPI_FADT_ARM_PSCI_USE_HVC (1 << 1)
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@ -497,4 +497,8 @@ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
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void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
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const char *oem_id, const char *oem_table_id);
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void build_spcr(GArray *table_data, BIOSLinker *linker,
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const AcpiSpcrData *f, const uint8_t rev,
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const char *oem_id, const char *oem_table_id);
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#endif
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