From 7e8c2b6ca8bed50375fb5bb3363d46588c526ef9 Mon Sep 17 00:00:00 2001 From: blueswir1 Date: Tue, 4 Mar 2008 20:00:18 +0000 Subject: [PATCH] Convert float helpers to TCG, fix fabsq in the process git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-sparc/exec.h | 32 ------ target-sparc/helper.h | 39 +++++++ target-sparc/op.c | 167 --------------------------- target-sparc/op_helper.c | 35 +++--- target-sparc/translate.c | 240 +++++++++++++++++++++++++++++---------- 5 files changed, 232 insertions(+), 281 deletions(-) diff --git a/target-sparc/exec.h b/target-sparc/exec.h index b9fffdc9c3..fce472b39f 100644 --- a/target-sparc/exec.h +++ b/target-sparc/exec.h @@ -52,53 +52,21 @@ register uint32_t T2 asm(AREG3); void cpu_lock(void); void cpu_unlock(void); void cpu_loop_exit(void); -void helper_ldfsr(void); void set_cwp(int new_cwp); void do_fitos(void); void do_fitod(void); -void do_fabss(void); -void do_fsqrts(void); -void do_fsqrtd(void); -void do_fcmps(void); -void do_fcmpd(void); -void do_fcmpes(void); -void do_fcmped(void); #if defined(CONFIG_USER_ONLY) void do_fitoq(void); -void do_fsqrtq(void); -void do_fcmpq(void); -void do_fcmpeq(void); #endif #ifdef TARGET_SPARC64 -void do_fabsd(void); void do_fxtos(void); void do_fxtod(void); -void do_fcmps_fcc1(void); -void do_fcmpd_fcc1(void); -void do_fcmps_fcc2(void); -void do_fcmpd_fcc2(void); -void do_fcmps_fcc3(void); -void do_fcmpd_fcc3(void); -void do_fcmpes_fcc1(void); -void do_fcmped_fcc1(void); -void do_fcmpes_fcc2(void); -void do_fcmped_fcc2(void); -void do_fcmpes_fcc3(void); -void do_fcmped_fcc3(void); #if defined(CONFIG_USER_ONLY) -void do_fabsq(void); void do_fxtoq(void); -void do_fcmpq_fcc1(void); -void do_fcmpq_fcc2(void); -void do_fcmpq_fcc3(void); -void do_fcmpeq_fcc1(void); -void do_fcmpeq_fcc2(void); -void do_fcmpeq_fcc3(void); #endif #endif void do_interrupt(int intno); void raise_exception(int tt); -void check_ieee_exceptions(); void memcpy32(target_ulong *dst, const target_ulong *src); target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); void dump_mmu(CPUState *env); diff --git a/target-sparc/helper.h b/target-sparc/helper.h index 3cdba6820b..94232b3476 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -33,3 +33,42 @@ uint64_t TCG_HELPER_PROTO helper_ld_asi(target_ulong addr, int asi, int size, int sign); void TCG_HELPER_PROTO helper_st_asi(target_ulong addr, uint64_t val, int asi, int size); +void TCG_HELPER_PROTO helper_ldfsr(void); +void TCG_HELPER_PROTO helper_check_ieee_exceptions(void); +void TCG_HELPER_PROTO helper_clear_float_exceptions(void); +void TCG_HELPER_PROTO helper_fabss(void); +void TCG_HELPER_PROTO helper_fsqrts(void); +void TCG_HELPER_PROTO helper_fsqrtd(void); +void TCG_HELPER_PROTO helper_fcmps(void); +void TCG_HELPER_PROTO helper_fcmpd(void); +void TCG_HELPER_PROTO helper_fcmpes(void); +void TCG_HELPER_PROTO helper_fcmped(void); +#if defined(CONFIG_USER_ONLY) +void TCG_HELPER_PROTO helper_fsqrtq(void); +void TCG_HELPER_PROTO helper_fcmpq(void); +void TCG_HELPER_PROTO helper_fcmpeq(void); +#endif +#ifdef TARGET_SPARC64 +void TCG_HELPER_PROTO helper_fabsd(void); +void TCG_HELPER_PROTO helper_fcmps_fcc1(void); +void TCG_HELPER_PROTO helper_fcmpd_fcc1(void); +void TCG_HELPER_PROTO helper_fcmps_fcc2(void); +void TCG_HELPER_PROTO helper_fcmpd_fcc2(void); +void TCG_HELPER_PROTO helper_fcmps_fcc3(void); +void TCG_HELPER_PROTO helper_fcmpd_fcc3(void); +void TCG_HELPER_PROTO helper_fcmpes_fcc1(void); +void TCG_HELPER_PROTO helper_fcmped_fcc1(void); +void TCG_HELPER_PROTO helper_fcmpes_fcc2(void); +void TCG_HELPER_PROTO helper_fcmped_fcc2(void); +void TCG_HELPER_PROTO helper_fcmpes_fcc3(void); +void TCG_HELPER_PROTO helper_fcmped_fcc3(void); +#if defined(CONFIG_USER_ONLY) +void TCG_HELPER_PROTO helper_fabsq(void); +void TCG_HELPER_PROTO helper_fcmpq_fcc1(void); +void TCG_HELPER_PROTO helper_fcmpq_fcc2(void); +void TCG_HELPER_PROTO helper_fcmpq_fcc3(void); +void TCG_HELPER_PROTO helper_fcmpeq_fcc1(void); +void TCG_HELPER_PROTO helper_fcmpeq_fcc2(void); +void TCG_HELPER_PROTO helper_fcmpeq_fcc3(void); +#endif +#endif diff --git a/target-sparc/op.c b/target-sparc/op.c index ee5d56f4f2..0fd6cfd4eb 100644 --- a/target-sparc/op.c +++ b/target-sparc/op.c @@ -763,7 +763,6 @@ void OPPROTO op_logic_T0_cc(void) void OPPROTO op_ldfsr(void) { PUT_FSR32(env, *((uint32_t *) &FT0)); - helper_ldfsr(); } void OPPROTO op_stfsr(void) @@ -1157,46 +1156,31 @@ void OPPROTO op_jz_T2_label(void) FORCE_RET(); } -void OPPROTO op_clear_ieee_excp_and_FTT(void) -{ - env->fsr &= ~(FSR_FTT_MASK | FSR_CEXC_MASK);; -} - #define F_OP(name, p) void OPPROTO op_f##name##p(void) #if defined(CONFIG_USER_ONLY) #define F_BINOP(name) \ F_OP(name, s) \ { \ - set_float_exception_flags(0, &env->fp_status); \ FT0 = float32_ ## name (FT0, FT1, &env->fp_status); \ - check_ieee_exceptions(); \ } \ F_OP(name, d) \ { \ - set_float_exception_flags(0, &env->fp_status); \ DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \ - check_ieee_exceptions(); \ } \ F_OP(name, q) \ { \ - set_float_exception_flags(0, &env->fp_status); \ QT0 = float128_ ## name (QT0, QT1, &env->fp_status); \ - check_ieee_exceptions(); \ } #else #define F_BINOP(name) \ F_OP(name, s) \ { \ - set_float_exception_flags(0, &env->fp_status); \ FT0 = float32_ ## name (FT0, FT1, &env->fp_status); \ - check_ieee_exceptions(); \ } \ F_OP(name, d) \ { \ - set_float_exception_flags(0, &env->fp_status); \ DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \ - check_ieee_exceptions(); \ } #endif @@ -1208,21 +1192,17 @@ F_BINOP(div); void OPPROTO op_fsmuld(void) { - set_float_exception_flags(0, &env->fp_status); DT0 = float64_mul(float32_to_float64(FT0, &env->fp_status), float32_to_float64(FT1, &env->fp_status), &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) void OPPROTO op_fdmulq(void) { - set_float_exception_flags(0, &env->fp_status); QT0 = float128_mul(float64_to_float128(DT0, &env->fp_status), float64_to_float128(DT1, &env->fp_status), &env->fp_status); - check_ieee_exceptions(); } #endif @@ -1252,134 +1232,23 @@ void OPPROTO op_fdmulq(void) } #endif -F_HELPER(sqrt); - F_OP(neg, s) { FT0 = float32_chs(FT1); } -F_OP(abs, s) -{ - do_fabss(); -} - -F_HELPER(cmp); -F_HELPER(cmpe); - #ifdef TARGET_SPARC64 F_OP(neg, d) { DT0 = float64_chs(DT1); } -F_OP(abs, d) -{ - do_fabsd(); -} - #if defined(CONFIG_USER_ONLY) F_OP(neg, q) { QT0 = float128_chs(QT1); } -F_OP(abs, q) -{ - do_fabsd(); -} -#endif - -void OPPROTO op_fcmps_fcc1(void) -{ - do_fcmps_fcc1(); -} - -void OPPROTO op_fcmpd_fcc1(void) -{ - do_fcmpd_fcc1(); -} - -void OPPROTO op_fcmps_fcc2(void) -{ - do_fcmps_fcc2(); -} - -void OPPROTO op_fcmpd_fcc2(void) -{ - do_fcmpd_fcc2(); -} - -void OPPROTO op_fcmps_fcc3(void) -{ - do_fcmps_fcc3(); -} - -void OPPROTO op_fcmpd_fcc3(void) -{ - do_fcmpd_fcc3(); -} - -void OPPROTO op_fcmpes_fcc1(void) -{ - do_fcmpes_fcc1(); -} - -void OPPROTO op_fcmped_fcc1(void) -{ - do_fcmped_fcc1(); -} - -void OPPROTO op_fcmpes_fcc2(void) -{ - do_fcmpes_fcc2(); -} - -void OPPROTO op_fcmped_fcc2(void) -{ - do_fcmped_fcc2(); -} - -void OPPROTO op_fcmpes_fcc3(void) -{ - do_fcmpes_fcc3(); -} - -void OPPROTO op_fcmped_fcc3(void) -{ - do_fcmped_fcc3(); -} - -#if defined(CONFIG_USER_ONLY) -void OPPROTO op_fcmpq_fcc1(void) -{ - do_fcmpq_fcc1(); -} - -void OPPROTO op_fcmpq_fcc2(void) -{ - do_fcmpq_fcc2(); -} - -void OPPROTO op_fcmpq_fcc3(void) -{ - do_fcmpq_fcc3(); -} - -void OPPROTO op_fcmpeq_fcc1(void) -{ - do_fcmpeq_fcc1(); -} - -void OPPROTO op_fcmpeq_fcc2(void) -{ - do_fcmpeq_fcc2(); -} - -void OPPROTO op_fcmpeq_fcc3(void) -{ - do_fcmpeq_fcc3(); -} #endif #endif @@ -1393,47 +1262,35 @@ F_HELPER(xto); #else F_OP(ito, s) { - set_float_exception_flags(0, &env->fp_status); FT0 = int32_to_float32(*((int32_t *)&FT1), &env->fp_status); - check_ieee_exceptions(); } F_OP(ito, d) { - set_float_exception_flags(0, &env->fp_status); DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) F_OP(ito, q) { - set_float_exception_flags(0, &env->fp_status); QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status); - check_ieee_exceptions(); } #endif #ifdef TARGET_SPARC64 F_OP(xto, s) { - set_float_exception_flags(0, &env->fp_status); FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status); - check_ieee_exceptions(); } F_OP(xto, d) { - set_float_exception_flags(0, &env->fp_status); DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) F_OP(xto, q) { - set_float_exception_flags(0, &env->fp_status); QT0 = int64_to_float128(*((int64_t *)&DT1), &env->fp_status); - check_ieee_exceptions(); } #endif #endif @@ -1443,93 +1300,69 @@ F_OP(xto, q) /* floating point conversion */ void OPPROTO op_fdtos(void) { - set_float_exception_flags(0, &env->fp_status); FT0 = float64_to_float32(DT1, &env->fp_status); - check_ieee_exceptions(); } void OPPROTO op_fstod(void) { - set_float_exception_flags(0, &env->fp_status); DT0 = float32_to_float64(FT1, &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) void OPPROTO op_fqtos(void) { - set_float_exception_flags(0, &env->fp_status); FT0 = float128_to_float32(QT1, &env->fp_status); - check_ieee_exceptions(); } void OPPROTO op_fstoq(void) { - set_float_exception_flags(0, &env->fp_status); QT0 = float32_to_float128(FT1, &env->fp_status); - check_ieee_exceptions(); } void OPPROTO op_fqtod(void) { - set_float_exception_flags(0, &env->fp_status); DT0 = float128_to_float64(QT1, &env->fp_status); - check_ieee_exceptions(); } void OPPROTO op_fdtoq(void) { - set_float_exception_flags(0, &env->fp_status); QT0 = float64_to_float128(DT1, &env->fp_status); - check_ieee_exceptions(); } #endif /* Float to integer conversion. */ void OPPROTO op_fstoi(void) { - set_float_exception_flags(0, &env->fp_status); *((int32_t *)&FT0) = float32_to_int32_round_to_zero(FT1, &env->fp_status); - check_ieee_exceptions(); } void OPPROTO op_fdtoi(void) { - set_float_exception_flags(0, &env->fp_status); *((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) void OPPROTO op_fqtoi(void) { - set_float_exception_flags(0, &env->fp_status); *((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status); - check_ieee_exceptions(); } #endif #ifdef TARGET_SPARC64 void OPPROTO op_fstox(void) { - set_float_exception_flags(0, &env->fp_status); *((int64_t *)&DT0) = float32_to_int64_round_to_zero(FT1, &env->fp_status); - check_ieee_exceptions(); } void OPPROTO op_fdtox(void) { - set_float_exception_flags(0, &env->fp_status); *((int64_t *)&DT0) = float64_to_int64_round_to_zero(DT1, &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) void OPPROTO op_fqtox(void) { - set_float_exception_flags(0, &env->fp_status); *((int64_t *)&DT0) = float128_to_int64_round_to_zero(QT1, &env->fp_status); - check_ieee_exceptions(); } #endif diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index f13a7b1d6e..bf46b9875d 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -50,7 +50,7 @@ void helper_trapcc(target_ulong nb_trap, target_ulong do_trap) } } -void check_ieee_exceptions(void) +void helper_check_ieee_exceptions(void) { target_ulong status; @@ -79,12 +79,15 @@ void check_ieee_exceptions(void) } } +void helper_clear_float_exceptions(void) +{ + set_float_exception_flags(0, &env->fp_status); +} + #ifdef USE_INT_TO_FLOAT_HELPERS void do_fitos(void) { - set_float_exception_flags(0, &env->fp_status); FT0 = int32_to_float32(*((int32_t *)&FT1), &env->fp_status); - check_ieee_exceptions(); } void do_fitod(void) @@ -102,73 +105,61 @@ void do_fitoq(void) #ifdef TARGET_SPARC64 void do_fxtos(void) { - set_float_exception_flags(0, &env->fp_status); FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status); - check_ieee_exceptions(); } void do_fxtod(void) { - set_float_exception_flags(0, &env->fp_status); DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) void do_fxtoq(void) { - set_float_exception_flags(0, &env->fp_status); QT0 = int64_to_float128(*((int32_t *)&DT1), &env->fp_status); - check_ieee_exceptions(); } #endif #endif #endif -void do_fabss(void) +void helper_fabss(void) { FT0 = float32_abs(FT1); } #ifdef TARGET_SPARC64 -void do_fabsd(void) +void helper_fabsd(void) { DT0 = float64_abs(DT1); } #if defined(CONFIG_USER_ONLY) -void do_fabsq(void) +void helper_fabsq(void) { QT0 = float128_abs(QT1); } #endif #endif -void do_fsqrts(void) +void helper_fsqrts(void) { - set_float_exception_flags(0, &env->fp_status); FT0 = float32_sqrt(FT1, &env->fp_status); - check_ieee_exceptions(); } -void do_fsqrtd(void) +void helper_fsqrtd(void) { - set_float_exception_flags(0, &env->fp_status); DT0 = float64_sqrt(DT1, &env->fp_status); - check_ieee_exceptions(); } #if defined(CONFIG_USER_ONLY) -void do_fsqrtq(void) +void helper_fsqrtq(void) { - set_float_exception_flags(0, &env->fp_status); QT0 = float128_sqrt(QT1, &env->fp_status); - check_ieee_exceptions(); } #endif #define GEN_FCMP(name, size, reg1, reg2, FS, TRAP) \ - void glue(do_, name) (void) \ + void glue(helper_, name) (void) \ { \ target_ulong new_fsr; \ \ diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 479818e0db..cefb848721 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -690,50 +690,121 @@ static void do_branch_reg(DisasContext * dc, int32_t offset, uint32_t insn) } static GenOpFunc * const gen_fcmps[4] = { - gen_op_fcmps, - gen_op_fcmps_fcc1, - gen_op_fcmps_fcc2, - gen_op_fcmps_fcc3, + helper_fcmps, + helper_fcmps_fcc1, + helper_fcmps_fcc2, + helper_fcmps_fcc3, }; static GenOpFunc * const gen_fcmpd[4] = { - gen_op_fcmpd, - gen_op_fcmpd_fcc1, - gen_op_fcmpd_fcc2, - gen_op_fcmpd_fcc3, + helper_fcmpd, + helper_fcmpd_fcc1, + helper_fcmpd_fcc2, + helper_fcmpd_fcc3, }; #if defined(CONFIG_USER_ONLY) static GenOpFunc * const gen_fcmpq[4] = { - gen_op_fcmpq, - gen_op_fcmpq_fcc1, - gen_op_fcmpq_fcc2, - gen_op_fcmpq_fcc3, + helper_fcmpq, + helper_fcmpq_fcc1, + helper_fcmpq_fcc2, + helper_fcmpq_fcc3, }; #endif static GenOpFunc * const gen_fcmpes[4] = { - gen_op_fcmpes, - gen_op_fcmpes_fcc1, - gen_op_fcmpes_fcc2, - gen_op_fcmpes_fcc3, + helper_fcmpes, + helper_fcmpes_fcc1, + helper_fcmpes_fcc2, + helper_fcmpes_fcc3, }; static GenOpFunc * const gen_fcmped[4] = { - gen_op_fcmped, - gen_op_fcmped_fcc1, - gen_op_fcmped_fcc2, - gen_op_fcmped_fcc3, + helper_fcmped, + helper_fcmped_fcc1, + helper_fcmped_fcc2, + helper_fcmped_fcc3, }; #if defined(CONFIG_USER_ONLY) static GenOpFunc * const gen_fcmpeq[4] = { - gen_op_fcmpeq, - gen_op_fcmpeq_fcc1, - gen_op_fcmpeq_fcc2, - gen_op_fcmpeq_fcc3, + helper_fcmpeq, + helper_fcmpeq_fcc1, + helper_fcmpeq_fcc2, + helper_fcmpeq_fcc3, }; #endif + +static inline void gen_op_fcmps(int fccno) +{ + tcg_gen_helper_0_0(gen_fcmps[fccno]); +} + +static inline void gen_op_fcmpd(int fccno) +{ + tcg_gen_helper_0_0(gen_fcmpd[fccno]); +} + +#if defined(CONFIG_USER_ONLY) +static inline void gen_op_fcmpq(int fccno) +{ + tcg_gen_helper_0_0(gen_fcmpq[fccno]); +} +#endif + +static inline void gen_op_fcmpes(int fccno) +{ + tcg_gen_helper_0_0(gen_fcmpes[fccno]); +} + +static inline void gen_op_fcmped(int fccno) +{ + tcg_gen_helper_0_0(gen_fcmped[fccno]); +} + +#if defined(CONFIG_USER_ONLY) +static inline void gen_op_fcmpeq(int fccno) +{ + tcg_gen_helper_0_0(gen_fcmpeq[fccno]); +} +#endif + +#else + +static inline void gen_op_fcmps(int fccno) +{ + tcg_gen_helper_0_0(helper_fcmps); +} + +static inline void gen_op_fcmpd(int fccno) +{ + tcg_gen_helper_0_0(helper_fcmpd); +} + +#if defined(CONFIG_USER_ONLY) +static inline void gen_op_fcmpq(int fccno) +{ + tcg_gen_helper_0_0(helper_fcmpq); +} +#endif + +static inline void gen_op_fcmpes(int fccno) +{ + tcg_gen_helper_0_0(helper_fcmpes); +} + +static inline void gen_op_fcmped(int fccno) +{ + tcg_gen_helper_0_0(helper_fcmped); +} + +#if defined(CONFIG_USER_ONLY) +static inline void gen_op_fcmpeq(int fccno) +{ + tcg_gen_helper_0_0(helper_fcmpeq); +} +#endif + #endif static int gen_trap_ifnofpu(DisasContext * dc) @@ -749,6 +820,18 @@ static int gen_trap_ifnofpu(DisasContext * dc) return 0; } +static inline void gen_op_clear_ieee_excp_and_FTT(void) +{ + tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr)); + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, ~(FSR_FTT_MASK | FSR_CEXC_MASK)); + tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr)); +} + +static inline void gen_clear_float_exceptions(void) +{ + tcg_gen_helper_0_0(helper_clear_float_exceptions); +} + /* asi moves */ #ifdef TARGET_SPARC64 static inline void gen_ld_asi(int insn, int size, int sign) @@ -1406,23 +1489,29 @@ static void disas_sparc_insn(DisasContext * dc) break; case 0x9: /* fabss */ gen_op_load_fpr_FT1(rs2); - gen_op_fabss(); + tcg_gen_helper_0_0(helper_fabss); gen_op_store_FT0_fpr(rd); break; case 0x29: /* fsqrts */ gen_op_load_fpr_FT1(rs2); - gen_op_fsqrts(); + gen_clear_float_exceptions(); + tcg_gen_helper_0_0(helper_fsqrts); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0x2a: /* fsqrtd */ gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_op_fsqrtd(); + gen_clear_float_exceptions(); + tcg_gen_helper_0_0(helper_fsqrtd); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x2b: /* fsqrtq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT1(QFPREG(rs2)); - gen_op_fsqrtq(); + gen_clear_float_exceptions(); + tcg_gen_helper_0_0(helper_fsqrtq); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1431,20 +1520,26 @@ static void disas_sparc_insn(DisasContext * dc) case 0x41: gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fadds(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0x42: gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_faddd(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x43: /* faddq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_faddq(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1453,20 +1548,26 @@ static void disas_sparc_insn(DisasContext * dc) case 0x45: gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fsubs(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0x46: gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fsubd(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x47: /* fsubq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fsubq(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1475,20 +1576,26 @@ static void disas_sparc_insn(DisasContext * dc) case 0x49: gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fmuls(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0x4a: gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fmuld(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x4b: /* fmulq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fmulq(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1497,20 +1604,26 @@ static void disas_sparc_insn(DisasContext * dc) case 0x4d: gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fdivs(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0x4e: gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fdivd(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x4f: /* fdivq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fdivq(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1519,14 +1632,18 @@ static void disas_sparc_insn(DisasContext * dc) case 0x69: gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fsmuld(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x6e: /* fdmulq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fdmulq(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1534,18 +1651,24 @@ static void disas_sparc_insn(DisasContext * dc) #endif case 0xc4: gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fitos(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0xc6: gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fdtos(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0xc7: /* fqtos */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fqtos(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; #else @@ -1564,7 +1687,9 @@ static void disas_sparc_insn(DisasContext * dc) case 0xcb: /* fqtod */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fqtod(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; #else @@ -1599,18 +1724,24 @@ static void disas_sparc_insn(DisasContext * dc) #endif case 0xd1: gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fstoi(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0xd2: gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fdtoi(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0xd3: /* fqtoi */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fqtoi(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; #else @@ -1645,13 +1776,13 @@ static void disas_sparc_insn(DisasContext * dc) #endif case 0xa: /* V9 fabsd */ gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_op_fabsd(); + tcg_gen_helper_0_0(helper_fabsd); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0xb: /* V9 fabsq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT1(QFPREG(rs2)); - gen_op_fabsq(); + tcg_gen_helper_0_0(helper_fabsq); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1659,18 +1790,24 @@ static void disas_sparc_insn(DisasContext * dc) #endif case 0x81: /* V9 fstox */ gen_op_load_fpr_FT1(rs2); + gen_clear_float_exceptions(); gen_op_fstox(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x82: /* V9 fdtox */ gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fdtox(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x83: /* V9 fqtox */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT1(QFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fqtox(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; #else @@ -1678,18 +1815,24 @@ static void disas_sparc_insn(DisasContext * dc) #endif case 0x84: /* V9 fxtos */ gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fxtos(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_FT0_fpr(rd); break; case 0x88: /* V9 fxtod */ gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fxtod(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_DT0_fpr(DFPREG(rd)); break; case 0x8c: /* V9 fxtoq */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_DT1(DFPREG(rs2)); + gen_clear_float_exceptions(); gen_op_fxtoq(); + tcg_gen_helper_0_0(helper_check_ieee_exceptions); gen_op_store_QT0_fpr(QFPREG(rd)); break; #else @@ -1953,30 +2096,18 @@ static void disas_sparc_insn(DisasContext * dc) case 0x51: /* fcmps, V9 %fcc */ gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); -#ifdef TARGET_SPARC64 - gen_fcmps[rd & 3](); -#else - gen_op_fcmps(); -#endif + gen_op_fcmps(rd & 3); break; case 0x52: /* fcmpd, V9 %fcc */ gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); -#ifdef TARGET_SPARC64 - gen_fcmpd[rd & 3](); -#else - gen_op_fcmpd(); -#endif + gen_op_fcmpd(rd & 3); break; case 0x53: /* fcmpq, V9 %fcc */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); -#ifdef TARGET_SPARC64 - gen_fcmpq[rd & 3](); -#else - gen_op_fcmpq(); -#endif + gen_op_fcmpq(rd & 3); break; #else /* !defined(CONFIG_USER_ONLY) */ goto nfpu_insn; @@ -1984,30 +2115,18 @@ static void disas_sparc_insn(DisasContext * dc) case 0x55: /* fcmpes, V9 %fcc */ gen_op_load_fpr_FT0(rs1); gen_op_load_fpr_FT1(rs2); -#ifdef TARGET_SPARC64 - gen_fcmpes[rd & 3](); -#else - gen_op_fcmpes(); -#endif + gen_op_fcmpes(rd & 3); break; case 0x56: /* fcmped, V9 %fcc */ gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); -#ifdef TARGET_SPARC64 - gen_fcmped[rd & 3](); -#else - gen_op_fcmped(); -#endif + gen_op_fcmped(rd & 3); break; case 0x57: /* fcmpeq, V9 %fcc */ #if defined(CONFIG_USER_ONLY) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); -#ifdef TARGET_SPARC64 - gen_fcmpeq[rd & 3](); -#else - gen_op_fcmpeq(); -#endif + gen_op_fcmpeq(rd & 3); break; #else/* !defined(CONFIG_USER_ONLY) */ goto nfpu_insn; @@ -3373,6 +3492,7 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_check_align_T0_3(); gen_op_ldst(ldf); gen_op_ldfsr(); + tcg_gen_helper_0_0(helper_ldfsr); break; case 0x22: /* load quad fpreg */ #if defined(CONFIG_USER_ONLY)