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sparc64 fix TLB match code 

TLB match code must respect page size, otherwise 4M page mappings may
be not found.

Also correct a typo in get_physical_address_code which should use IMMU
registers.

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>

--
Kind regards,
Igor V. Kovalenko
master
Igor Kovalenko 2009-04-27 23:06:33 +04:00 committed by Blue Swirl
parent c0c440f39c
commit 82f2cfc31b
1 changed files with 7 additions and 7 deletions
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14
target-sparc/helper.c
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@ -404,7 +404,7 @@ static int get_physical_address_data(CPUState *env,
}
// ctx match, vaddr match, valid?
if (env->dmmuregs[1] == (env->dtlb_tag[i] & 0x1fff) &&
(address & mask) == (env->dtlb_tag[i] & ~0x1fffULL) &&
(address & mask) == (env->dtlb_tag[i] & mask) &&
(env->dtlb_tte[i] & 0x8000000000000000ULL)) {
// access ok?
if (((env->dtlb_tte[i] & 0x4) && is_user) ||
@ -420,8 +420,8 @@ static int get_physical_address_data(CPUState *env,
#endif
return 1;
}
*physical = (env->dtlb_tte[i] & mask & 0x1fffffff000ULL) +
(address & ~mask & 0x1fffffff000ULL);
*physical = ((env->dtlb_tte[i] & mask) | (address & ~mask)) &
0x1ffffffe000ULL;
*prot = PAGE_READ;
if (env->dtlb_tte[i] & 0x2)
*prot |= PAGE_WRITE;
@ -467,7 +467,7 @@ static int get_physical_address_code(CPUState *env,
}
// ctx match, vaddr match, valid?
if (env->dmmuregs[1] == (env->itlb_tag[i] & 0x1fff) &&
(address & mask) == (env->itlb_tag[i] & ~0x1fffULL) &&
(address & mask) == (env->itlb_tag[i] & mask) &&
(env->itlb_tte[i] & 0x8000000000000000ULL)) {
// access ok?
if ((env->itlb_tte[i] & 0x4) && is_user) {
@ -481,8 +481,8 @@ static int get_physical_address_code(CPUState *env,
#endif
return 1;
}
*physical = (env->itlb_tte[i] & mask & 0x1fffffff000ULL) +
(address & ~mask & 0x1fffffff000ULL);
*physical = ((env->itlb_tte[i] & mask) | (address & ~mask)) &
0x1ffffffe000ULL;
*prot = PAGE_EXEC;
return 0;
}
@ -490,7 +490,7 @@ static int get_physical_address_code(CPUState *env,
#ifdef DEBUG_MMU
printf("TMISS at 0x%" PRIx64 "\n", address);
#endif
env->immuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff);
env->immuregs[6] = (address & ~0x1fffULL) | (env->immuregs[1] & 0x1fff);
env->exception_index = TT_TMISS;
return 1;
}