mirror of https://github.com/proxmox/mirror_qemu
hw/riscv: microchip_pfsoc: Use the PLIC config helper function
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20211022060133.3045020-4-alistair.francis@opensource.wdc.commaster
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4e8fb53c0b
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8486eb8cdc
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@ -187,7 +187,6 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
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MemoryRegion *envm_data = g_new(MemoryRegion, 1);
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MemoryRegion *envm_data = g_new(MemoryRegion, 1);
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MemoryRegion *qspi_xip_mem = g_new(MemoryRegion, 1);
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MemoryRegion *qspi_xip_mem = g_new(MemoryRegion, 1);
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char *plic_hart_config;
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char *plic_hart_config;
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size_t plic_hart_config_len;
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NICInfo *nd;
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NICInfo *nd;
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int i;
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int i;
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@ -262,18 +261,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
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l2lim_mem);
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l2lim_mem);
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/* create PLIC hart topology configuration string */
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/* create PLIC hart topology configuration string */
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plic_hart_config_len = (strlen(MICROCHIP_PFSOC_PLIC_HART_CONFIG) + 1) *
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plic_hart_config = riscv_plic_hart_config_string(ms->smp.cpus);
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ms->smp.cpus;
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plic_hart_config = g_malloc0(plic_hart_config_len);
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for (i = 0; i < ms->smp.cpus; i++) {
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if (i != 0) {
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strncat(plic_hart_config, "," MICROCHIP_PFSOC_PLIC_HART_CONFIG,
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plic_hart_config_len);
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} else {
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strncat(plic_hart_config, "M", plic_hart_config_len);
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}
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plic_hart_config_len -= (strlen(MICROCHIP_PFSOC_PLIC_HART_CONFIG) + 1);
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}
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/* PLIC */
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/* PLIC */
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s->plic = sifive_plic_create(memmap[MICROCHIP_PFSOC_PLIC].base,
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s->plic = sifive_plic_create(memmap[MICROCHIP_PFSOC_PLIC].base,
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@ -138,7 +138,6 @@ enum {
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#define MICROCHIP_PFSOC_MANAGEMENT_CPU_COUNT 1
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#define MICROCHIP_PFSOC_MANAGEMENT_CPU_COUNT 1
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#define MICROCHIP_PFSOC_COMPUTE_CPU_COUNT 4
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#define MICROCHIP_PFSOC_COMPUTE_CPU_COUNT 4
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#define MICROCHIP_PFSOC_PLIC_HART_CONFIG "MS"
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#define MICROCHIP_PFSOC_PLIC_NUM_SOURCES 185
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#define MICROCHIP_PFSOC_PLIC_NUM_SOURCES 185
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#define MICROCHIP_PFSOC_PLIC_NUM_PRIORITIES 7
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#define MICROCHIP_PFSOC_PLIC_NUM_PRIORITIES 7
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#define MICROCHIP_PFSOC_PLIC_PRIORITY_BASE 0x04
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#define MICROCHIP_PFSOC_PLIC_PRIORITY_BASE 0x04
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