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target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ 

New R6 COP1 conditional branches currently don't have delay slot. Fixing this
by setting MIPS_HFLAG_BDS32 flag which is required for branches having 4-byte
delay slot.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
master
Leon Alrae 2014-11-06 10:29:38 +00:00
parent e30614d517
commit 854795753c
1 changed files with 1 additions and 0 deletions
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target-mips/translate.c
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@ -8104,6 +8104,7 @@ static void gen_compute_branch1_r6(DisasContext *ctx, uint32_t op,
MIPS_DEBUG("%s: cond %02x target " TARGET_FMT_lx, opn,
ctx->hflags, btarget);
ctx->btarget = btarget;
ctx->hflags |= MIPS_HFLAG_BDS32;
out:
tcg_temp_free_i64(t0);