acpi: q35: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors

replaces adhoc build_isa_devices_aml() with generic AcpiDevAmlIf
way to build bridge AML including all devices that are attached
to its ISA bus.

Later when PCI is converted to AcpiDevAmlIf, build_q35_isa_bridge()
will also be dropped since PCI parts itself will take care of
building device prologue/epilogue AML for each enumerated PCI device.

Expected AML change is contextual, where ISA devices are moved from
separately declared _SB.PCI0.ISA scope, directly under Device(ISA)
node.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20220608135340.3304695-21-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
master
Igor Mammedov 2022-06-08 09:53:25 -04:00 committed by Michael S. Tsirkin
parent 92ea7fb3fe
commit 887e8e9d3a
2 changed files with 30 additions and 19 deletions

View File

@ -864,20 +864,6 @@ static Aml *build_vmbus_device_aml(VMBusBridge *vmbus_bridge)
return dev;
}
static void build_isa_devices_aml(Aml *table)
{
bool ambiguous;
Object *obj = object_resolve_path_type("", TYPE_ISA_BUS, &ambiguous);
Aml *scope;
assert(obj && !ambiguous);
scope = aml_scope("_SB.PCI0.ISA");
isa_build_aml(ISA_BUS(obj), scope);
aml_append(table, scope);
}
static void build_dbg_aml(Aml *table)
{
Aml *field;
@ -1263,15 +1249,22 @@ static void build_q35_isa_bridge(Aml *table)
{
Aml *dev;
Aml *scope;
Object *obj;
bool ambiguous;
/*
* temporarily fish out isa bridge, build_q35_isa_bridge() will be dropped
* once PCI is converted to AcpiDevAmlIf and would be ble to generate
* AML for bridge itself
*/
obj = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambiguous);
assert(obj && !ambiguous);
scope = aml_scope("_SB.PCI0");
dev = aml_device("ISA");
aml_append(dev, aml_name_decl("_ADR", aml_int(0x001F0000)));
/* ICH9 PCI to ISA irq remapping */
aml_append(dev, aml_operation_region("PIRQ", AML_PCI_CONFIG,
aml_int(0x60), 0x0C));
call_dev_aml_func(DEVICE(obj), dev);
aml_append(scope, dev);
aml_append(table, scope);
}
@ -1531,7 +1524,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
build_hpet_aml(dsdt);
}
build_q35_isa_bridge(dsdt);
build_isa_devices_aml(dsdt);
if (pm->pcihp_bridge_en) {
build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
}

View File

@ -50,6 +50,7 @@
#include "hw/core/cpu.h"
#include "hw/nvram/fw_cfg.h"
#include "qemu/cutils.h"
#include "hw/acpi/acpi_aml_interface.h"
/*****************************************************************************/
/* ICH9 LPC PCI to ISA bridge */
@ -803,12 +804,28 @@ static void ich9_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
acpi_send_gpe_event(&s->pm.acpi_regs, s->pm.irq, ev);
}
static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
{
BusChild *kid;
ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
BusState *bus = BUS(s->isa_bus);
/* ICH9 PCI to ISA irq remapping */
aml_append(scope, aml_operation_region("PIRQ", AML_PCI_CONFIG,
aml_int(0x60), 0x0C));
QTAILQ_FOREACH(kid, &bus->children, sibling) {
call_dev_aml_func(DEVICE(kid->child), scope);
}
}
static void ich9_lpc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass);
AcpiDevAmlIfClass *amldevc = ACPI_DEV_AML_IF_CLASS(klass);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->reset = ich9_lpc_reset;
@ -833,6 +850,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data)
adevc->ospm_status = ich9_pm_ospm_status;
adevc->send_event = ich9_send_gpe;
adevc->madt_cpu = pc_madt_cpu_entry;
amldevc->build_dev_aml = build_ich9_isa_aml;
}
static const TypeInfo ich9_lpc_info = {
@ -845,6 +863,7 @@ static const TypeInfo ich9_lpc_info = {
{ TYPE_HOTPLUG_HANDLER },
{ TYPE_ACPI_DEVICE_IF },
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ TYPE_ACPI_DEV_AML_IF },
{ }
}
};