vitalif
/
mirror_qemu
mirror of https://github.com/proxmox/mirror_qemu
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target/riscv: Replace is_32bit with get_xl/get_xlen 

In preparation for RV128, replace a simple predicate
with a more versatile test.

Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-9-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
master
Richard Henderson 2021-10-19 20:17:02 -07:00 committed by Alistair Francis
parent 4e97d459a0
commit 905b9fcde1
1 changed files with 18 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
target/riscv/translate.c
View File

@ -91,16 +91,19 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
}
#ifdef TARGET_RISCV32
# define is_32bit(ctx) true
#define get_xl(ctx) MXL_RV32
#elif defined(CONFIG_USER_ONLY)
# define is_32bit(ctx) false
#define get_xl(ctx) MXL_RV64
#else
static inline bool is_32bit(DisasContext *ctx)
{
return ctx->xl == MXL_RV32;
}
#define get_xl(ctx) ((ctx)->xl)
#endif
/* The word size for this machine mode. */
static inline int __attribute__((unused)) get_xlen(DisasContext *ctx)
{
return 16 << get_xl(ctx);
}
/* The word size for this operation. */
static inline int oper_len(DisasContext *ctx)
{
@ -257,7 +260,7 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
static void mark_fs_dirty(DisasContext *ctx)
{
TCGv tmp;
target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
if (ctx->mstatus_fs != MSTATUS_FS) {
/* Remember the state change for the rest of the TB. */
@ -316,16 +319,16 @@ EX_SH(12)
} \
} while (0)
#define REQUIRE_32BIT(ctx) do { \
if (!is_32bit(ctx)) { \
return false; \
} \
#define REQUIRE_32BIT(ctx) do { \
if (get_xl(ctx) != MXL_RV32) { \
return false; \
} \
} while (0)
#define REQUIRE_64BIT(ctx) do { \
if (is_32bit(ctx)) { \
return false; \
} \
#define REQUIRE_64BIT(ctx) do { \
if (get_xl(ctx) < MXL_RV64) { \
return false; \
} \
} while (0)
static int ex_rvc_register(DisasContext *ctx, int reg)