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target/arm: Fix coding style issues 

Since we'll move this code around, fix its style first.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190701132516.26392-9-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Philippe Mathieu-Daudé 2019-07-01 17:26:20 +01:00 committed by Peter Maydell
parent 9a223097e4
commit 9798ac7162
2 changed files with 30 additions and 17 deletions
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11
target/arm/translate.c
View File

@ -9109,7 +9109,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
loaded_base = 0;
loaded_var = NULL;
n = 0;
for(i=0;i<16;i++) {
for (i = 0; i < 16; i++) {
if (insn & (1 << i))
n++;
}
@ -9132,7 +9132,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
}
}
j = 0;
for(i=0;i<16;i++) {
for (i = 0; i < 16; i++) {
if (insn & (1 << i)) {
if (is_load) {
/* load */
@ -12353,12 +12353,13 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags)
return;
}
for(i=0;i<16;i++) {
for (i = 0; i < 16; i++) {
qemu_fprintf(f, "R%02d=%08x", i, env->regs[i]);
if ((i % 4) == 3)
if ((i % 4) == 3) {
qemu_fprintf(f, "\n");
else
} else {
qemu_fprintf(f, " ");
}
}
if (arm_feature(env, ARM_FEATURE_M)) {

36
target/arm/vfp_helper.c
View File

@ -34,18 +34,24 @@ static inline int vfp_exceptbits_from_host(int host_bits)
{
int target_bits = 0;
if (host_bits & float_flag_invalid)
if (host_bits & float_flag_invalid) {
target_bits |= 1;
if (host_bits & float_flag_divbyzero)
}
if (host_bits & float_flag_divbyzero) {
target_bits |= 2;
if (host_bits & float_flag_overflow)
}
if (host_bits & float_flag_overflow) {
target_bits |= 4;
if (host_bits & (float_flag_underflow | float_flag_output_denormal))
}
if (host_bits & (float_flag_underflow | float_flag_output_denormal)) {
target_bits |= 8;
if (host_bits & float_flag_inexact)
}
if (host_bits & float_flag_inexact) {
target_bits |= 0x10;
if (host_bits & float_flag_input_denormal)
}
if (host_bits & float_flag_input_denormal) {
target_bits |= 0x80;
}
return target_bits;
}
@ -80,18 +86,24 @@ static inline int vfp_exceptbits_to_host(int target_bits)
{
int host_bits = 0;
if (target_bits & 1)
if (target_bits & 1) {
host_bits |= float_flag_invalid;
if (target_bits & 2)
}
if (target_bits & 2) {
host_bits |= float_flag_divbyzero;
if (target_bits & 4)
}
if (target_bits & 4) {
host_bits |= float_flag_overflow;
if (target_bits & 8)
}
if (target_bits & 8) {
host_bits |= float_flag_underflow;
if (target_bits & 0x10)
}
if (target_bits & 0x10) {
host_bits |= float_flag_inexact;
if (target_bits & 0x80)
}
if (target_bits & 0x80) {
host_bits |= float_flag_input_denormal;
}
return host_bits;
}