From 9f6523e8e4689cafdbed7c10b7cf7c775b5a607b Mon Sep 17 00:00:00 2001 From: Joseph Burt Date: Sun, 21 Jan 2024 21:14:39 +0000 Subject: [PATCH] tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct When tcg_out_qemu_st_{index,direct} were merged, the direct case for MO_64 was omitted, causing qemu_st_i64 to be encoded as 0xffffffff due to underflow when adding h.base and h.index. Fixes: 1df6d611bdc2 ("tcg/arm: Introduce HostAddress") Signed-off-by: Joseph Burt Message-Id: <20240121211439.100829-1-caseorum@gmail.com> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index fc78566494..a9aa8aa91c 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1662,6 +1662,9 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp opc, TCGReg datalo, } else { tcg_out_strd_r(s, h.cond, datalo, h.base, h.index); } + } else if (h.index < 0) { + tcg_out_st32_12(s, h.cond, datalo, h.base, 0); + tcg_out_st32_12(s, h.cond, datahi, h.base, 4); } else if (h.index_scratch) { tcg_out_st32_rwb(s, h.cond, datalo, h.index, h.base); tcg_out_st32_12(s, h.cond, datahi, h.index, 4);