mirror of https://github.com/proxmox/mirror_qemu
hw/misc/mps2-fpgaio: Implement 1Hz and 100Hz counters
The MPS2 FPGAIO block includes some simple free-running counters. Implement these. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180820141116.9118-2-peter.maydell@linaro.orgmaster
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299953b989
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a1982f90a4
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@ -22,6 +22,7 @@
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#include "hw/sysbus.h"
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#include "hw/sysbus.h"
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#include "hw/registerfields.h"
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#include "hw/registerfields.h"
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#include "hw/misc/mps2-fpgaio.h"
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#include "hw/misc/mps2-fpgaio.h"
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#include "qemu/timer.h"
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REG32(LED0, 0)
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REG32(LED0, 0)
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REG32(BUTTON, 8)
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REG32(BUTTON, 8)
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@ -32,10 +33,21 @@ REG32(PRESCALE, 0x1c)
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REG32(PSCNTR, 0x20)
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REG32(PSCNTR, 0x20)
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REG32(MISC, 0x4c)
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REG32(MISC, 0x4c)
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static uint32_t counter_from_tickoff(int64_t now, int64_t tick_offset, int frq)
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{
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return muldiv64(now - tick_offset, frq, NANOSECONDS_PER_SECOND);
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}
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static int64_t tickoff_from_counter(int64_t now, uint32_t count, int frq)
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{
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return now - muldiv64(count, NANOSECONDS_PER_SECOND, frq);
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}
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static uint64_t mps2_fpgaio_read(void *opaque, hwaddr offset, unsigned size)
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static uint64_t mps2_fpgaio_read(void *opaque, hwaddr offset, unsigned size)
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{
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{
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MPS2FPGAIO *s = MPS2_FPGAIO(opaque);
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MPS2FPGAIO *s = MPS2_FPGAIO(opaque);
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uint64_t r;
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uint64_t r;
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int64_t now;
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switch (offset) {
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switch (offset) {
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case A_LED0:
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case A_LED0:
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@ -54,10 +66,15 @@ static uint64_t mps2_fpgaio_read(void *opaque, hwaddr offset, unsigned size)
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r = s->misc;
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r = s->misc;
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break;
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break;
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case A_CLK1HZ:
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case A_CLK1HZ:
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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r = counter_from_tickoff(now, s->clk1hz_tick_offset, 1);
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break;
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case A_CLK100HZ:
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case A_CLK100HZ:
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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r = counter_from_tickoff(now, s->clk100hz_tick_offset, 100);
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break;
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case A_COUNTER:
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case A_COUNTER:
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case A_PSCNTR:
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case A_PSCNTR:
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/* These are all upcounters of various frequencies. */
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qemu_log_mask(LOG_UNIMP, "MPS2 FPGAIO: counters unimplemented\n");
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qemu_log_mask(LOG_UNIMP, "MPS2 FPGAIO: counters unimplemented\n");
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r = 0;
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r = 0;
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break;
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break;
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@ -76,6 +93,7 @@ static void mps2_fpgaio_write(void *opaque, hwaddr offset, uint64_t value,
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unsigned size)
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unsigned size)
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{
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{
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MPS2FPGAIO *s = MPS2_FPGAIO(opaque);
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MPS2FPGAIO *s = MPS2_FPGAIO(opaque);
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int64_t now;
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trace_mps2_fpgaio_write(offset, value, size);
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trace_mps2_fpgaio_write(offset, value, size);
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@ -100,6 +118,14 @@ static void mps2_fpgaio_write(void *opaque, hwaddr offset, uint64_t value,
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"MPS2 FPGAIO: MISC control bits unimplemented\n");
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"MPS2 FPGAIO: MISC control bits unimplemented\n");
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s->misc = value;
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s->misc = value;
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break;
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break;
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case A_CLK1HZ:
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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s->clk1hz_tick_offset = tickoff_from_counter(now, value, 1);
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break;
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case A_CLK100HZ:
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now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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s->clk100hz_tick_offset = tickoff_from_counter(now, value, 100);
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break;
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default:
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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qemu_log_mask(LOG_GUEST_ERROR,
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"MPS2 FPGAIO write: bad offset 0x%x\n", (int) offset);
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"MPS2 FPGAIO write: bad offset 0x%x\n", (int) offset);
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@ -116,11 +142,14 @@ static const MemoryRegionOps mps2_fpgaio_ops = {
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static void mps2_fpgaio_reset(DeviceState *dev)
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static void mps2_fpgaio_reset(DeviceState *dev)
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{
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{
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MPS2FPGAIO *s = MPS2_FPGAIO(dev);
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MPS2FPGAIO *s = MPS2_FPGAIO(dev);
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int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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trace_mps2_fpgaio_reset();
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trace_mps2_fpgaio_reset();
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s->led0 = 0;
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s->led0 = 0;
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s->prescale = 0;
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s->prescale = 0;
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s->misc = 0;
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s->misc = 0;
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s->clk1hz_tick_offset = tickoff_from_counter(now, 0, 1);
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s->clk100hz_tick_offset = tickoff_from_counter(now, 0, 100);
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}
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}
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static void mps2_fpgaio_init(Object *obj)
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static void mps2_fpgaio_init(Object *obj)
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@ -133,6 +162,24 @@ static void mps2_fpgaio_init(Object *obj)
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sysbus_init_mmio(sbd, &s->iomem);
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sysbus_init_mmio(sbd, &s->iomem);
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}
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}
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static bool mps2_fpgaio_counters_needed(void *opaque)
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{
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/* Currently vmstate.c insists all subsections have a 'needed' function */
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return true;
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}
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static const VMStateDescription mps2_fpgaio_counters_vmstate = {
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.name = "mps2-fpgaio/counters",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = mps2_fpgaio_counters_needed,
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.fields = (VMStateField[]) {
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VMSTATE_INT64(clk1hz_tick_offset, MPS2FPGAIO),
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VMSTATE_INT64(clk100hz_tick_offset, MPS2FPGAIO),
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VMSTATE_END_OF_LIST()
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}
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};
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static const VMStateDescription mps2_fpgaio_vmstate = {
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static const VMStateDescription mps2_fpgaio_vmstate = {
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.name = "mps2-fpgaio",
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.name = "mps2-fpgaio",
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.version_id = 1,
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.version_id = 1,
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@ -142,6 +189,10 @@ static const VMStateDescription mps2_fpgaio_vmstate = {
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VMSTATE_UINT32(prescale, MPS2FPGAIO),
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VMSTATE_UINT32(prescale, MPS2FPGAIO),
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VMSTATE_UINT32(misc, MPS2FPGAIO),
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VMSTATE_UINT32(misc, MPS2FPGAIO),
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VMSTATE_END_OF_LIST()
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VMSTATE_END_OF_LIST()
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},
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.subsections = (const VMStateDescription*[]) {
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&mps2_fpgaio_counters_vmstate,
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NULL
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}
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}
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};
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};
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@ -38,6 +38,10 @@ typedef struct {
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uint32_t misc;
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uint32_t misc;
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uint32_t prescale_clk;
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uint32_t prescale_clk;
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/* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */
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int64_t clk1hz_tick_offset;
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int64_t clk100hz_tick_offset;
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} MPS2FPGAIO;
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} MPS2FPGAIO;
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#endif
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#endif
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