mirror of https://github.com/proxmox/mirror_qemu
RISC-V: Handle bus errors in the page table walker
We directly access physical memory while walking the page tables on RISC-V, but while doing so we were using cpu_ld*() which does not report bus errors. This patch converts the page table walker over to use address_space_ld*(), which allows bus errors to be detected. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>master
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@ -169,7 +169,8 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
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/* NOTE: the env->pc value visible here will not be
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/* NOTE: the env->pc value visible here will not be
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* correct, but the value visible to the exception handler
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* correct, but the value visible to the exception handler
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* (riscv_cpu_do_interrupt) is correct */
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* (riscv_cpu_do_interrupt) is correct */
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MemTxResult res;
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MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
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int mode = mmu_idx;
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int mode = mmu_idx;
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if (mode == PRV_M && access_type != MMU_INST_FETCH) {
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if (mode == PRV_M && access_type != MMU_INST_FETCH) {
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@ -256,11 +257,16 @@ restart:
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1 << MMU_DATA_LOAD, PRV_S)) {
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1 << MMU_DATA_LOAD, PRV_S)) {
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return TRANSLATE_PMP_FAIL;
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return TRANSLATE_PMP_FAIL;
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}
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}
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#if defined(TARGET_RISCV32)
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#if defined(TARGET_RISCV32)
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target_ulong pte = ldl_phys(cs->as, pte_addr);
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target_ulong pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
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#elif defined(TARGET_RISCV64)
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#elif defined(TARGET_RISCV64)
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target_ulong pte = ldq_phys(cs->as, pte_addr);
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target_ulong pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
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#endif
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#endif
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if (res != MEMTX_OK) {
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return TRANSLATE_FAIL;
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}
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hwaddr ppn = pte >> PTE_PPN_SHIFT;
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hwaddr ppn = pte >> PTE_PPN_SHIFT;
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if (!(pte & PTE_V)) {
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if (!(pte & PTE_V)) {
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