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ppc/pnv: Add POWER10 quads 

and use a pnv_chip_power10_quad_realize() helper to avoid code
duplication with P9. This still needs some refinements on the XSCOM
registers handling in PnvQuad.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
master
Cédric Le Goater 2022-03-02 06:51:39 +01:00
parent 8bf682a349
commit ae4c68e366
2 changed files with 43 additions and 10 deletions
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50
hw/ppc/pnv.c
View File

@ -1388,6 +1388,21 @@ static void pnv_chip_power9_instance_init(Object *obj)
}
}
static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq,
PnvCore *pnv_core)
{
char eq_name[32];
int core_id = CPU_CORE(pnv_core)->core_id;
snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
sizeof(*eq), TYPE_PNV_QUAD,
&error_fatal, NULL);
object_property_set_int(OBJECT(eq), "quad-id", core_id, &error_fatal);
qdev_realize(DEVICE(eq), NULL, &error_fatal);
}
static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
{
PnvChip *chip = PNV_CHIP(chip9);
@ -1397,18 +1412,9 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
chip9->quads = g_new0(PnvQuad, chip9->nr_quads);
for (i = 0; i < chip9->nr_quads; i++) {
char eq_name[32];
PnvQuad *eq = &chip9->quads[i];
PnvCore *pnv_core = chip->cores[i * 4];
int core_id = CPU_CORE(pnv_core)->core_id;
snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
sizeof(*eq), TYPE_PNV_QUAD,
&error_fatal, NULL);
object_property_set_int(OBJECT(eq), "quad-id", core_id, &error_fatal);
qdev_realize(DEVICE(eq), NULL, &error_fatal);
pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4]);
pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->quad_id),
&eq->xscom_regs);
@ -1585,6 +1591,24 @@ static void pnv_chip_power10_instance_init(Object *obj)
object_initialize_child(obj, "occ", &chip10->occ, TYPE_PNV10_OCC);
}
static void pnv_chip_power10_quad_realize(Pnv10Chip *chip10, Error **errp)
{
PnvChip *chip = PNV_CHIP(chip10);
int i;
chip10->nr_quads = DIV_ROUND_UP(chip->nr_cores, 4);
chip10->quads = g_new0(PnvQuad, chip10->nr_quads);
for (i = 0; i < chip10->nr_quads; i++) {
PnvQuad *eq = &chip10->quads[i];
pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4]);
pnv_xscom_add_subregion(chip, PNV10_XSCOM_EQ_BASE(eq->quad_id),
&eq->xscom_regs);
}
}
static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
{
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
@ -1606,6 +1630,12 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
return;
}
pnv_chip_power10_quad_realize(chip10, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
/* XIVE2 interrupt controller (POWER10) */
object_property_set_int(OBJECT(&chip10->xive), "ic-bar",
PNV10_XIVE2_IC_BASE(chip), &error_fatal);

3
include/hw/ppc/pnv.h
View File

@ -129,6 +129,9 @@ struct Pnv10Chip {
Pnv9Psi psi;
PnvLpcController lpc;
PnvOCC occ;
uint32_t nr_quads;
PnvQuad *quads;
};
#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)