mirror of https://github.com/proxmox/mirror_qemu
target/arm: Replace offset with pc in gen_exception_internal_insn
The offset is variable depending on the instruction set. Passing in the actual value is clearer in intent. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190807045335.1361-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>master
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a767fac802
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aee828e754
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@ -253,9 +253,9 @@ static void gen_exception_internal(int excp)
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tcg_temp_free_i32(tcg_excp);
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}
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static void gen_exception_internal_insn(DisasContext *s, int offset, int excp)
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static void gen_exception_internal_insn(DisasContext *s, uint64_t pc, int excp)
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{
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gen_a64_set_pc_im(s->base.pc_next - offset);
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gen_a64_set_pc_im(pc);
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gen_exception_internal(excp);
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s->base.is_jmp = DISAS_NORETURN;
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}
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@ -1924,7 +1924,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
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break;
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}
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#endif
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gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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} else {
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unsupported_encoding(s, insn);
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}
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@ -14220,7 +14220,7 @@ static bool aarch64_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
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/* End the TB early; it likely won't be executed */
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dc->base.is_jmp = DISAS_TOO_MANY;
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} else {
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gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
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gen_exception_internal_insn(dc, dc->base.pc_next, EXCP_DEBUG);
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/* The address covered by the breakpoint must be
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included in [tb->pc, tb->pc + tb->size) in order
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to for it to be properly cleared -- thus we
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@ -1241,10 +1241,10 @@ static inline void gen_smc(DisasContext *s)
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s->base.is_jmp = DISAS_SMC;
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}
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static void gen_exception_internal_insn(DisasContext *s, int offset, int excp)
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static void gen_exception_internal_insn(DisasContext *s, uint32_t pc, int excp)
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{
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gen_set_condexec(s);
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gen_set_pc_im(s, s->base.pc_next - offset);
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gen_set_pc_im(s, pc);
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gen_exception_internal(excp);
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s->base.is_jmp = DISAS_NORETURN;
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}
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@ -1296,7 +1296,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
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s->current_el != 0 &&
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#endif
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(imm == (s->thumb ? 0x3c : 0xf000))) {
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gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
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gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
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return;
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}
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@ -11940,7 +11940,7 @@ static bool arm_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
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/* End the TB early; it's likely not going to be executed */
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dc->base.is_jmp = DISAS_TOO_MANY;
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} else {
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gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
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gen_exception_internal_insn(dc, dc->base.pc_next, EXCP_DEBUG);
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/* The address covered by the breakpoint must be
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included in [tb->pc, tb->pc + tb->size) in order
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to for it to be properly cleared -- thus we
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