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target-ppc: Introduce tcheck 

Add a degenerate implementation of the Transaction Check (tcheck)
instruction.  Since transaction always immediately fail, this
implementation simply sets CR[BF] to 0b1000, i.e. TDOOMED = 1
and MSR[TS] == 0.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
master
Tom Musta 2014-12-18 10:34:36 -06:00 committed by Alexander Graf
parent 56a846157e
commit aeedd58234
1 changed files with 17 additions and 0 deletions
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17
target-ppc/translate.c
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@ -9707,6 +9707,21 @@ GEN_TM_NOOP(tabortdc);
GEN_TM_NOOP(tabortdci);
GEN_TM_NOOP(tsr);
static void gen_tcheck(DisasContext *ctx)
{
if (unlikely(!ctx->tm_enabled)) {
gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_TM);
return;
}
/* Because tbegin always fails, the tcheck implementation
* is simple:
*
* CR[CRF] = TDOOMED || MSR[TS] || 0b0
* = 0b1 || 0b00 || 0b0
*/
tcg_gen_movi_i32(cpu_crf[crfD(ctx->opcode)], 0x8);
}
static opcode_t opcodes[] = {
GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE),
GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER),
@ -11136,6 +11151,8 @@ GEN_HANDLER2_E(tabortdci, "tabortdci", 0x1F, 0x0E, 0x1B, 0x00000000, \
PPC_NONE, PPC2_TM),
GEN_HANDLER2_E(tsr, "tsr", 0x1F, 0x0E, 0x17, 0x03DFF800, \
PPC_NONE, PPC2_TM),
GEN_HANDLER2_E(tcheck, "tcheck", 0x1F, 0x0E, 0x16, 0x007FF800, \
PPC_NONE, PPC2_TM),
};
#include "helper_regs.h"