mirror of https://github.com/proxmox/mirror_qemu
target-ppc: add modulo word operations
Adding following instructions: moduw: Modulo Unsigned Word modsw: Modulo Signed Word Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>master
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f2442ef93c
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af2c66200e
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@ -1176,6 +1176,52 @@ GEN_DIVE(divde, divde, 0);
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GEN_DIVE(divdeo, divde, 1);
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#endif
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static inline void gen_op_arith_modw(DisasContext *ctx, TCGv ret, TCGv arg1,
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TCGv arg2, int sign)
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{
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TCGv_i32 t0 = tcg_temp_new_i32();
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TCGv_i32 t1 = tcg_temp_new_i32();
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tcg_gen_trunc_tl_i32(t0, arg1);
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tcg_gen_trunc_tl_i32(t1, arg2);
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if (sign) {
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TCGv_i32 t2 = tcg_temp_new_i32();
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TCGv_i32 t3 = tcg_temp_new_i32();
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tcg_gen_setcondi_i32(TCG_COND_EQ, t2, t0, INT_MIN);
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tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, -1);
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tcg_gen_and_i32(t2, t2, t3);
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tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, 0);
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tcg_gen_or_i32(t2, t2, t3);
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tcg_gen_movi_i32(t3, 0);
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tcg_gen_movcond_i32(TCG_COND_NE, t1, t2, t3, t2, t1);
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tcg_gen_rem_i32(t3, t0, t1);
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tcg_gen_ext_i32_tl(ret, t3);
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tcg_temp_free_i32(t2);
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tcg_temp_free_i32(t3);
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} else {
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TCGv_i32 t2 = tcg_const_i32(1);
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TCGv_i32 t3 = tcg_const_i32(0);
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tcg_gen_movcond_i32(TCG_COND_EQ, t1, t1, t3, t2, t1);
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tcg_gen_remu_i32(t3, t0, t1);
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tcg_gen_extu_i32_tl(ret, t3);
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tcg_temp_free_i32(t2);
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tcg_temp_free_i32(t3);
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}
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tcg_temp_free_i32(t0);
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tcg_temp_free_i32(t1);
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}
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#define GEN_INT_ARITH_MODW(name, opc3, sign) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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gen_op_arith_modw(ctx, cpu_gpr[rD(ctx->opcode)], \
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cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
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sign); \
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}
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GEN_INT_ARITH_MODW(moduw, 0x08, 0);
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GEN_INT_ARITH_MODW(modsw, 0x18, 1);
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/* mulhw mulhw. */
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static void gen_mulhw(DisasContext *ctx)
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{
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@ -10242,6 +10288,8 @@ GEN_HANDLER_E(divwe, 0x1F, 0x0B, 0x0D, 0, PPC_NONE, PPC2_DIVE_ISA206),
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GEN_HANDLER_E(divweo, 0x1F, 0x0B, 0x1D, 0, PPC_NONE, PPC2_DIVE_ISA206),
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GEN_HANDLER_E(divweu, 0x1F, 0x0B, 0x0C, 0, PPC_NONE, PPC2_DIVE_ISA206),
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GEN_HANDLER_E(divweuo, 0x1F, 0x0B, 0x1C, 0, PPC_NONE, PPC2_DIVE_ISA206),
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GEN_HANDLER_E(modsw, 0x1F, 0x0B, 0x18, 0x00000001, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E(moduw, 0x1F, 0x0B, 0x08, 0x00000001, PPC_NONE, PPC2_ISA300),
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#if defined(TARGET_PPC64)
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#undef GEN_INT_ARITH_DIVD
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