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intc/xilinx_intc: Dont lower IRQ when HIE cleared 

This is a little strange. It is lowering the parent IRQ pin on input
when HIE is cleared. There is no such behaviour in the real hardware.

ISR changes based on interrupt pin state are already guarded on HIE
being set. So we can just delete this if in its entirety.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
master
Peter Crosthwaite 2013-06-11 11:00:40 +10:00 committed by Edgar E. Iglesias
parent fa96d6142f
commit afd59989db
1 changed files with 0 additions and 5 deletions
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5
hw/intc/xilinx_intc.c
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@ -143,11 +143,6 @@ static void irq_handler(void *opaque, int irq, int level)
{
struct xlx_pic *p = opaque;
if (!(p->regs[R_MER] & 2)) {
qemu_irq_lower(p->parent_irq);
return;
}
/* edge triggered interrupt */
if (p->c_kind_of_intr & (1 << irq) && p->regs[R_MER] & 2) {
p->regs[R_ISR] |= (level << irq);