mirror of https://github.com/proxmox/mirror_qemu
Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162master
parent
51a0f568c5
commit
b1d8e52e63
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@ -51,7 +51,7 @@ static struct {
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1024
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};
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struct SDLAudioState {
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static struct SDLAudioState {
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int exit;
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SDL_mutex *mutex;
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SDL_sem *sem;
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@ -322,7 +322,7 @@ static void vmdk_parent_close(BlockDriverState *bs)
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bdrv_close(bs->backing_hd);
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}
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int parent_open = 0;
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static int parent_open = 0;
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static int vmdk_parent_open(BlockDriverState *bs, const char * filename)
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{
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BDRVVmdkState *s = bs->opaque;
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@ -65,6 +65,7 @@ for input; do
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done
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echo >> $output
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echo "extern const char *const xml_builtin[][2];" >> $output
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echo "const char *const xml_builtin[][2] = {" >> $output
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for input; do
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@ -36,12 +36,6 @@ these four paragraphs for those parts of this code that are retained.
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#define SNAN_BIT_IS_ONE 0
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#endif
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/*----------------------------------------------------------------------------
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| Underflow tininess-detection mode, statically initialized to default value.
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| (The declaration in `softfloat.h' must match the `int8' type here.)
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*----------------------------------------------------------------------------*/
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int8 float_detect_tininess = float_tininess_after_rounding;
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/*----------------------------------------------------------------------------
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| Raises the exceptions specified by `flags'. Floating-point traps can be
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| defined here if desired. It is currently not possible for such a trap
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@ -87,6 +87,7 @@ struct bt_hci_link_s {
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};
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/* LMP layer emulation */
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#if 0
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static void bt_submit_lmp(struct bt_device_s *bt, int length, uint8_t *data)
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{
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int resp, resplen, error, op, tr;
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@ -386,7 +387,7 @@ static void bt_submit_lmp(struct bt_device_s *bt, int length, uint8_t *data)
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respdata[0] |= tr;
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}
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void bt_submit_raw_acl(struct bt_piconet_s *net, int length, uint8_t *data)
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static void bt_submit_raw_acl(struct bt_piconet_s *net, int length, uint8_t *data)
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{
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struct bt_device_s *slave;
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if (length < 1)
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@ -411,6 +412,7 @@ void bt_submit_raw_acl(struct bt_piconet_s *net, int length, uint8_t *data)
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break;
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}
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}
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#endif
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/* HCI layer emulation */
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@ -1118,7 +1120,7 @@ static void bt_hci_mode_tick(void *opaque)
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bt_hci_lmp_mode_change_master(hci, link, acl_active, 0);
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}
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void bt_hci_reset(struct bt_hci_s *hci)
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static void bt_hci_reset(struct bt_hci_s *hci)
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{
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hci->acl_len = 0;
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hci->last_cmd = 0;
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@ -435,7 +435,8 @@ void retu_key_event(void *retu, int state)
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s->status |= 1 << 5;
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}
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void retu_head_event(void *retu, int state)
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#if 0
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static void retu_head_event(void *retu, int state)
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{
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struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
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struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
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@ -452,7 +453,7 @@ void retu_head_event(void *retu, int state)
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s->result[retu_adc_head_det] = 123;
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}
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void retu_hook_event(void *retu, int state)
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static void retu_hook_event(void *retu, int state)
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{
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struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
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struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
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@ -468,6 +469,7 @@ void retu_hook_event(void *retu, int state)
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else
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s->result[retu_adc_hook_det] = 123;
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}
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#endif
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/* Tahvo/Betty */
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struct cbus_tahvo_s {
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@ -891,7 +891,6 @@ static int pci_gt64120_map_irq(PCIDevice *pci_dev, int irq_num)
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}
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}
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extern PCIDevice *piix4_dev;
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static int pci_irq_levels[4];
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static void pci_gt64120_set_irq(qemu_irq *pic, int irq_num, int level)
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@ -168,12 +168,12 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
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}
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}
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CPUReadMemoryFunc *mst_fpga_readfn[] = {
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static CPUReadMemoryFunc *mst_fpga_readfn[] = {
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mst_fpga_readb,
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mst_fpga_readb,
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mst_fpga_readb,
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};
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CPUWriteMemoryFunc *mst_fpga_writefn[] = {
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static CPUWriteMemoryFunc *mst_fpga_writefn[] = {
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mst_fpga_writeb,
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mst_fpga_writeb,
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mst_fpga_writeb,
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@ -236,7 +236,7 @@ static i2c_interface *mixer_i2c;
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/* Wolfson 8750 I2C address */
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#define MP_WM_ADDR 0x34
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const char audio_name[] = "mv88w8618";
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static const char audio_name[] = "mv88w8618";
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typedef struct musicpal_audio_state {
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uint32_t base;
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@ -106,7 +106,7 @@ struct nand_flash_s {
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# include "nand.c"
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/* Information based on Linux drivers/mtd/nand/nand_ids.c */
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struct nand_info_s {
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static const struct nand_info_s {
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int size;
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int width;
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int page_shift;
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@ -2174,7 +2174,7 @@ static CPUWriteMemoryFunc *omap_sti_fifo_writefn[] = {
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omap_badwidth_write8,
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};
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struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta,
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static struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta,
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target_phys_addr_t channel_base, qemu_irq irq, omap_clk clk,
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CharDriverState *chr)
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{
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@ -1101,7 +1101,7 @@ void omap_clk_adduser(struct clk *clk, qemu_irq user)
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/* If a clock is allowed to idle, it is disabled automatically when
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* all of clock domains using it are disabled. */
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int omap_clk_is_idle(struct clk *clk)
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static int omap_clk_is_idle(struct clk *clk)
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{
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struct clk *chld;
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@ -128,7 +128,7 @@ enum {
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IRQ_INTERNAL = 0x02,
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IRQ_TIMER = 0x04,
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IRQ_SPECIAL = 0x08,
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} IRQ_src_type;
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};
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typedef struct IRQ_queue_t {
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uint32_t queue[BF_WIDTH(MAX_IRQ)];
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1
hw/pc.h
1
hw/pc.h
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@ -105,6 +105,7 @@ void i440fx_set_smm(PCIDevice *d, int val);
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int piix3_init(PCIBus *bus, int devfn);
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void i440fx_init_memory_mappings(PCIDevice *d);
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extern PCIDevice *piix4_dev;
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int piix4_init(PCIBus *bus, int devfn);
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/* vga.c */
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@ -129,7 +129,7 @@ typedef struct KBDState {
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int it_shift;
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} KBDState;
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KBDState kbd_state;
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static KBDState kbd_state;
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/* update irq and KBD_STAT_[MOUSE_]OBF */
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/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
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@ -210,7 +210,7 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
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/* PIIX3 PCI to ISA bridge */
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PCIDevice *piix3_dev;
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static PCIDevice *piix3_dev;
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PCIDevice *piix4_dev;
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/* just used for simpler irq handling. */
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6
hw/ppc.c
6
hw/ppc.c
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@ -806,10 +806,12 @@ clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq)
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}
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/* Specific helpers for POWER & PowerPC 601 RTC */
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clk_setup_cb cpu_ppc601_rtc_init (CPUState *env)
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#if 0
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static clk_setup_cb cpu_ppc601_rtc_init (CPUState *env)
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{
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return cpu_ppc_tb_init(env, 7812500);
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}
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#endif
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void cpu_ppc601_store_rtcu (CPUState *env, uint32_t value)
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{
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@ -1343,7 +1345,7 @@ static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value)
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return tmp;
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}
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uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
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static uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
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{
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uint32_t i;
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uint16_t crc = 0xFFFF;
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4
hw/ppc.h
4
hw/ppc.h
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@ -29,3 +29,7 @@ void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
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extern CPUWriteMemoryFunc *PPC_io_write[];
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extern CPUReadMemoryFunc *PPC_io_read[];
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void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
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void ppc40x_irq_init (CPUState *env);
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void ppc6xx_irq_init (CPUState *env);
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void ppc970_irq_init (CPUState *env);
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@ -84,9 +84,11 @@ static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
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/* ISA IO ports bridge */
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#define PPC_IO_BASE 0x80000000
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#if 0
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/* Speaker port 0x61 */
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int speaker_data_on;
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int dummy_refresh_clock;
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static int speaker_data_on;
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static int dummy_refresh_clock;
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#endif
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static void speaker_ioport_write (void *opaque, uint32_t addr, uint32_t val)
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{
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@ -518,13 +520,13 @@ static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
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return ret;
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}
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CPUWriteMemoryFunc *PPC_prep_io_write[] = {
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static CPUWriteMemoryFunc *PPC_prep_io_write[] = {
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&PPC_prep_io_writeb,
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&PPC_prep_io_writew,
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&PPC_prep_io_writel,
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};
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CPUReadMemoryFunc *PPC_prep_io_read[] = {
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static CPUReadMemoryFunc *PPC_prep_io_read[] = {
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&PPC_prep_io_readb,
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&PPC_prep_io_readw,
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&PPC_prep_io_readl,
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@ -1255,7 +1255,7 @@ static void rtl8139_reset(RTL8139State *s)
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RTL8139TallyCounters_clear(&s->tally_counters);
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}
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void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
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static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
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{
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counters->TxOk = 0;
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counters->RxOk = 0;
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@ -23,20 +23,20 @@
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#include "qemu-timer.h"
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#include "soc_dma.h"
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void transfer_mem2mem(struct soc_dma_ch_s *ch)
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static void transfer_mem2mem(struct soc_dma_ch_s *ch)
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{
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memcpy(ch->paddr[0], ch->paddr[1], ch->bytes);
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ch->paddr[0] += ch->bytes;
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ch->paddr[1] += ch->bytes;
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}
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void transfer_mem2fifo(struct soc_dma_ch_s *ch)
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static void transfer_mem2fifo(struct soc_dma_ch_s *ch)
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{
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ch->io_fn[1](ch->io_opaque[1], ch->paddr[0], ch->bytes);
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ch->paddr[0] += ch->bytes;
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}
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void transfer_fifo2mem(struct soc_dma_ch_s *ch)
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static void transfer_fifo2mem(struct soc_dma_ch_s *ch)
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{
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ch->io_fn[0](ch->io_opaque[0], ch->paddr[1], ch->bytes);
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ch->paddr[1] += ch->bytes;
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@ -47,7 +47,7 @@ void transfer_fifo2mem(struct soc_dma_ch_s *ch)
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* oprating systems may not need to use them. */
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static void *fifo_buf;
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static int fifo_size;
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void transfer_fifo2fifo(struct soc_dma_ch_s *ch)
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static void transfer_fifo2fifo(struct soc_dma_ch_s *ch)
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{
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if (ch->bytes > fifo_size)
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fifo_buf = qemu_realloc(fifo_buf, fifo_size = ch->bytes);
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@ -58,7 +58,7 @@ static void init_dev(tc58128_dev * dev, const char *filename)
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}
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}
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void handle_command(tc58128_dev * dev, uint8_t command)
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static void handle_command(tc58128_dev * dev, uint8_t command)
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{
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switch (command) {
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case 0xff:
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@ -86,7 +86,7 @@ void handle_command(tc58128_dev * dev, uint8_t command)
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}
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}
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void handle_address(tc58128_dev * dev, uint8_t data)
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static void handle_address(tc58128_dev * dev, uint8_t data)
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{
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switch (dev->state) {
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case READ1:
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@ -119,7 +119,7 @@ void handle_address(tc58128_dev * dev, uint8_t data)
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}
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}
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uint8_t handle_read(tc58128_dev * dev)
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static uint8_t handle_read(tc58128_dev * dev)
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{
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#if 0
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if (dev->address % 0x100000 == 0)
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@ -131,7 +131,7 @@ uint8_t handle_read(tc58128_dev * dev)
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/* We never mark the device as busy, so interrupts cannot be triggered
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XXXXX */
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int tc58128_cb(uint16_t porta, uint16_t portb,
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static int tc58128_cb(uint16_t porta, uint16_t portb,
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uint16_t * periph_pdtra, uint16_t * periph_portadir,
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uint16_t * periph_pdtrb, uint16_t * periph_portbdir)
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{
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@ -23,6 +23,7 @@
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#include "hw.h"
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#include "qemu-timer.h"
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#include "console.h"
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#include "devices.h"
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#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - (p ? 12 : 10)))
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@ -319,7 +320,7 @@ static void tsc2005_reset(struct tsc2005_state_s *s)
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tsc2005_pin_update(s);
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}
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uint8_t tsc2005_txrx_word(void *opaque, uint8_t value)
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static uint8_t tsc2005_txrx_word(void *opaque, uint8_t value)
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{
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struct tsc2005_state_s *s = opaque;
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uint32_t ret = 0;
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|
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@ -26,6 +26,7 @@
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#include "qemu-timer.h"
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#include "console.h"
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#include "omap.h" /* For struct i2s_codec_s and struct uwire_slave_s */
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#include "devices.h"
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#define TSC_DATA_REGISTERS_PAGE 0x0
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#define TSC_CONTROL_REGISTERS_PAGE 0x1
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|
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@ -25,6 +25,7 @@
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#include "usb.h"
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#include "omap.h"
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#include "irq.h"
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#include "devices.h"
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struct tusb_s {
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int iomemtype[2];
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|
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@ -155,12 +155,12 @@ static void scoop_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
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}
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}
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CPUReadMemoryFunc *scoop_readfn[] = {
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static CPUReadMemoryFunc *scoop_readfn[] = {
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scoop_readb,
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scoop_readb,
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scoop_readb,
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};
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CPUWriteMemoryFunc *scoop_writefn[] = {
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static CPUWriteMemoryFunc *scoop_writefn[] = {
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scoop_writeb,
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scoop_writeb,
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scoop_writeb,
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|
@ -252,7 +252,7 @@ struct scoop_info_s *scoop_init(struct pxa2xx_state_s *cpu,
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#define MAGIC_CHG(a, b, c, d) ((d << 24) | (c << 16) | (b << 8) | a)
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struct __attribute__ ((__packed__)) sl_param_info {
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static struct __attribute__ ((__packed__)) sl_param_info {
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uint32_t comadj_keyword;
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int32_t comadj;
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|
@ -102,7 +102,7 @@ static abi_ulong copy_strings(abi_ulong p, int n, char **s)
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return p;
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}
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int target_pread(int fd, abi_ulong ptr, abi_ulong len,
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static int target_pread(int fd, abi_ulong ptr, abi_ulong len,
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abi_ulong offset)
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{
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void *buf;
|
||||
|
@ -336,7 +336,7 @@ failed:
|
|||
/****************************************************************************/
|
||||
|
||||
/* ??? This does not handle endianness correctly. */
|
||||
void old_reloc(struct lib_info *libinfo, uint32_t rl)
|
||||
static void old_reloc(struct lib_info *libinfo, uint32_t rl)
|
||||
{
|
||||
#ifdef DEBUG
|
||||
char *segment[] = { "TEXT", "DATA", "BSS", "*UNKNOWN*" };
|
||||
|
|
|
@ -283,7 +283,7 @@ static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
|
|||
}
|
||||
|
||||
#ifdef TARGET_X86_64
|
||||
uint64_t idt_table[512];
|
||||
static uint64_t idt_table[512];
|
||||
|
||||
static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
|
||||
uint64_t addr, unsigned int sel)
|
||||
|
@ -303,7 +303,7 @@ static void set_idt(int n, unsigned int dpl)
|
|||
set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
|
||||
}
|
||||
#else
|
||||
uint64_t idt_table[256];
|
||||
static uint64_t idt_table[256];
|
||||
|
||||
static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
|
||||
uint32_t addr, unsigned int sel)
|
||||
|
|
|
@ -2500,7 +2500,7 @@ static bitmask_transtbl fcntl_flags_tbl[] = {
|
|||
#if defined(TARGET_I386)
|
||||
|
||||
/* NOTE: there is really one LDT for all the threads */
|
||||
uint8_t *ldt_table;
|
||||
static uint8_t *ldt_table;
|
||||
|
||||
static abi_long read_ldt(abi_ulong ptr, unsigned long bytecount)
|
||||
{
|
||||
|
|
|
@ -75,7 +75,7 @@ static int term_outbuf_index;
|
|||
|
||||
static void monitor_start_input(void);
|
||||
|
||||
CPUState *mon_cpu = NULL;
|
||||
static CPUState *mon_cpu = NULL;
|
||||
|
||||
void term_flush(void)
|
||||
{
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
|
||||
#define NBD_BUFFER_SIZE (1024*1024)
|
||||
|
||||
int verbose;
|
||||
static int verbose;
|
||||
|
||||
static void usage(const char *name)
|
||||
{
|
||||
|
|
|
@ -2181,7 +2181,7 @@ static const arg membar_table[] =
|
|||
|
||||
/* Return the name for membar value VALUE or NULL if not found. */
|
||||
|
||||
const char *
|
||||
static const char *
|
||||
sparc_decode_membar (value)
|
||||
int value;
|
||||
{
|
||||
|
@ -2203,7 +2203,7 @@ static const arg prefetch_table[] =
|
|||
|
||||
/* Return the name for prefetch value VALUE or NULL if not found. */
|
||||
|
||||
const char *
|
||||
static const char *
|
||||
sparc_decode_prefetch (value)
|
||||
int value;
|
||||
{
|
||||
|
@ -2226,7 +2226,7 @@ static const arg sparclet_cpreg_table[] =
|
|||
|
||||
/* Return the name for sparclet cpreg value VALUE or NULL if not found. */
|
||||
|
||||
const char *
|
||||
static const char *
|
||||
sparc_decode_sparclet_cpreg (value)
|
||||
int value;
|
||||
{
|
||||
|
|
|
@ -31,7 +31,7 @@ void raise_exception(int tt)
|
|||
|
||||
/* thread support */
|
||||
|
||||
spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
|
||||
static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
|
||||
|
||||
void cpu_lock(void)
|
||||
{
|
||||
|
|
|
@ -756,7 +756,7 @@ static void gen_test_cc(int cc, int label)
|
|||
dead_tmp(tmp);
|
||||
}
|
||||
|
||||
const uint8_t table_logic_cc[16] = {
|
||||
static const uint8_t table_logic_cc[16] = {
|
||||
1, /* and */
|
||||
1, /* xor */
|
||||
0, /* sub */
|
||||
|
|
|
@ -96,7 +96,7 @@ const CPU86_LDouble f15rk[7] =
|
|||
|
||||
/* broken thread support */
|
||||
|
||||
spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
|
||||
static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
|
||||
|
||||
void helper_lock(void)
|
||||
{
|
||||
|
|
|
@ -459,7 +459,7 @@ static inline void gen_store_fpr64 (TCGv t, int reg)
|
|||
return; \
|
||||
}
|
||||
|
||||
void _decode_opc(DisasContext * ctx)
|
||||
static void _decode_opc(DisasContext * ctx)
|
||||
{
|
||||
#if 0
|
||||
fprintf(stderr, "Translating opcode 0x%04x\n", ctx->opcode);
|
||||
|
@ -1762,7 +1762,7 @@ void _decode_opc(DisasContext * ctx)
|
|||
ctx->bstate = BS_EXCP;
|
||||
}
|
||||
|
||||
void decode_opc(DisasContext * ctx)
|
||||
static void decode_opc(DisasContext * ctx)
|
||||
{
|
||||
uint32_t old_flags = ctx->flags;
|
||||
|
||||
|
|
|
@ -63,8 +63,8 @@ TCGOpDef tcg_op_defs[] = {
|
|||
#undef DEF2
|
||||
};
|
||||
|
||||
TCGRegSet tcg_target_available_regs[2];
|
||||
TCGRegSet tcg_target_call_clobber_regs;
|
||||
static TCGRegSet tcg_target_available_regs[2];
|
||||
static TCGRegSet tcg_target_call_clobber_regs;
|
||||
|
||||
/* XXX: move that inside the context */
|
||||
uint16_t *gen_opc_ptr;
|
||||
|
|
Loading…
Reference in New Issue