grackle: use qdev gpios for PCI IRQs

Currently an object link property is used to pass a reference to the Heathrow
PIC into the PCI host bridge so that grackle_init_irqs() can connect the PCI
IRQs to the PIC itself.

This can be simplified by defining the PCI IRQs as qdev gpios and then wiring
up the PCI IRQs to the PIC in the Old World machine init function.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201013114922.2946-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
master
Mark Cave-Ayland 2020-10-13 12:49:21 +01:00
parent 348b8d1a76
commit b950914df3
2 changed files with 7 additions and 19 deletions

View File

@ -28,7 +28,6 @@
#include "hw/ppc/mac.h"
#include "hw/qdev-properties.h"
#include "hw/pci/pci.h"
#include "hw/intc/heathrow_pic.h"
#include "hw/irq.h"
#include "qapi/error.h"
#include "qemu/module.h"
@ -41,7 +40,6 @@ struct GrackleState {
PCIHostState parent_obj;
uint32_t ofw_addr;
HeathrowState *pic;
qemu_irq irqs[4];
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
@ -62,15 +60,6 @@ static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
qemu_set_irq(s->irqs[irq_num], level);
}
static void grackle_init_irqs(GrackleState *s)
{
int i;
for (i = 0; i < ARRAY_SIZE(s->irqs); i++) {
s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i);
}
}
static void grackle_realize(DeviceState *dev, Error **errp)
{
GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
@ -85,7 +74,6 @@ static void grackle_realize(DeviceState *dev, Error **errp)
0, 4, TYPE_PCI_BUS);
pci_create_simple(phb->bus, 0, "grackle");
grackle_init_irqs(s);
}
static void grackle_init(Object *obj)
@ -106,15 +94,12 @@ static void grackle_init(Object *obj)
memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops,
DEVICE(obj), "pci-data-idx", 0x1000);
object_property_add_link(obj, "pic", TYPE_HEATHROW,
(Object **) &s->pic,
qdev_prop_allow_set_link_before_realize,
0);
sysbus_init_mmio(sbd, &phb->conf_mem);
sysbus_init_mmio(sbd, &phb->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
sysbus_init_mmio(sbd, &s->pci_io);
qdev_init_gpio_out(DEVICE(obj), s->irqs, ARRAY_SIZE(s->irqs));
}
static void grackle_pci_realize(PCIDevice *d, Error **errp)

View File

@ -253,10 +253,9 @@ static void ppc_heathrow_init(MachineState *machine)
/* Grackle PCI host bridge */
dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
&error_abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, GRACKLE_BASE);
sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
/* PCI hole */
@ -266,6 +265,10 @@ static void ppc_heathrow_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), 0xfe000000,
sysbus_mmio_get_region(s, 3));
for (i = 0; i < 4; i++) {
qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x15 + i));
}
pci_bus = PCI_HOST_BRIDGE(dev)->bus;
pci_vga_init(pci_bus);