mirror of https://github.com/proxmox/mirror_qemu
arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180227143852.11175-26-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>master
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9869502838
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b96a54c7e5
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@ -828,3 +828,16 @@ uint32_t HELPER(advsimd_f16touinth)(float16 a, void *fpstp)
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}
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}
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return float16_to_uint16(a, fpst);
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return float16_to_uint16(a, fpst);
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}
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}
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/*
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* Square Root and Reciprocal square root
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*/
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float16 HELPER(sqrt_f16)(float16 a, void *fpstp)
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{
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float_status *s = fpstp;
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return float16_sqrt(a, s);
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}
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@ -80,3 +80,4 @@ DEF_HELPER_2(advsimd_rinth_exact, f16, f16, ptr)
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DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)
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DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)
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DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)
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DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)
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DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)
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DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)
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DEF_HELPER_2(sqrt_f16, f16, f16, ptr)
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@ -11388,6 +11388,8 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
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case 0x6f: /* FNEG */
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case 0x6f: /* FNEG */
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need_fpst = false;
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need_fpst = false;
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break;
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break;
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case 0x7f: /* FSQRT (vector) */
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break;
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default:
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default:
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fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
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fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
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g_assert_not_reached();
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g_assert_not_reached();
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@ -11502,6 +11504,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
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case 0x6f: /* FNEG */
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case 0x6f: /* FNEG */
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tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
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tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);
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break;
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break;
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case 0x7f: /* FSQRT */
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gen_helper_sqrt_f16(tcg_res, tcg_op, tcg_fpstatus);
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break;
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default:
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default:
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g_assert_not_reached();
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g_assert_not_reached();
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}
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}
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