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microblaze: Improve srl 

write_carry only looks at bit zero, no need to mask out the others.

Meassured a 12% speed improvement in linux-user srl loops.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
master
Edgar E. Iglesias 2013-10-24 19:03:44 +02:00
parent a235900e22
commit bb3cb951ef
1 changed files with 2 additions and 5 deletions
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7
target-microblaze/translate.c
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@ -780,13 +780,10 @@ static void dec_bit(DisasContext *dc)
case 0x1:
case 0x41:
/* srl. */
t0 = tcg_temp_new();
LOG_DIS("srl r%d r%d\n", dc->rd, dc->ra);
/* Update carry. */
tcg_gen_andi_tl(t0, cpu_R[dc->ra], 1);
write_carry(dc, t0);
tcg_temp_free(t0);
/* Update carry. Note that write carry only looks at the LSB. */
write_carry(dc, cpu_R[dc->ra]);
if (dc->rd) {
if (op == 0x41)
tcg_gen_shri_tl(cpu_R[dc->rd], cpu_R[dc->ra], 1);