mirror of https://github.com/proxmox/mirror_qemu
microblaze: Improve srl
write_carry only looks at bit zero, no need to mask out the others. Meassured a 12% speed improvement in linux-user srl loops. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>master
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a235900e22
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bb3cb951ef
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@ -780,13 +780,10 @@ static void dec_bit(DisasContext *dc)
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case 0x1:
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case 0x1:
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case 0x41:
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case 0x41:
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/* srl. */
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/* srl. */
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t0 = tcg_temp_new();
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LOG_DIS("srl r%d r%d\n", dc->rd, dc->ra);
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LOG_DIS("srl r%d r%d\n", dc->rd, dc->ra);
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/* Update carry. */
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/* Update carry. Note that write carry only looks at the LSB. */
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tcg_gen_andi_tl(t0, cpu_R[dc->ra], 1);
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write_carry(dc, cpu_R[dc->ra]);
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write_carry(dc, t0);
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tcg_temp_free(t0);
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if (dc->rd) {
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if (dc->rd) {
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if (op == 0x41)
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if (op == 0x41)
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tcg_gen_shri_tl(cpu_R[dc->rd], cpu_R[dc->ra], 1);
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tcg_gen_shri_tl(cpu_R[dc->rd], cpu_R[dc->ra], 1);
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