mirror of https://github.com/proxmox/mirror_qemu
ppc: Add support for 'mffsce' instruction
ISA 3.0B added a set of Floating-Point Status and Control Register (FPSCR) instructions: mffsce, mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl. This patch adds support for 'mffsce' instruction. 'mffsce' is identical to 'mffs', except that it also clears the exception enable bits in the FPSCR. On CPUs without support for 'mffsce' (below ISA 3.0), the instruction will execute identically to 'mffs'. Signed-off-by: Paul A. Clarke <pc@us.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1568817082-1384-1-git-send-email-pc@us.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>master
parent
a2735cf483
commit
bc7a45ab88
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@ -639,6 +639,36 @@ static void gen_mffsl(DisasContext *ctx)
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tcg_temp_free_i64(t0);
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}
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/* mffsce */
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static void gen_mffsce(DisasContext *ctx)
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{
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TCGv_i64 t0;
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TCGv_i32 mask;
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if (unlikely(!(ctx->insns_flags2 & PPC2_ISA300))) {
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return gen_mffs(ctx);
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}
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if (unlikely(!ctx->fpu_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_FPU);
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return;
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}
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t0 = tcg_temp_new_i64();
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gen_reset_fpstatus();
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tcg_gen_extu_tl_i64(t0, cpu_fpscr);
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set_fpr(rD(ctx->opcode), t0);
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/* Clear exception enable bits in the FPSCR. */
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tcg_gen_andi_i64(t0, t0, ~FP_ENABLES);
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mask = tcg_const_i32(0x0003);
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gen_helper_store_fpscr(cpu_env, t0, mask);
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tcg_temp_free_i32(mask);
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tcg_temp_free_i64(t0);
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}
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static void gen_helper_mffscrn(DisasContext *ctx, TCGv_i64 t1)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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@ -105,6 +105,8 @@ GEN_HANDLER_E(fmrgew, 0x3F, 0x06, 0x1E, 0x00000001, PPC_NONE, PPC2_VSX207),
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GEN_HANDLER_E(fmrgow, 0x3F, 0x06, 0x1A, 0x00000001, PPC_NONE, PPC2_VSX207),
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GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT),
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GEN_HANDLER_E_2(mffs, 0x3F, 0x07, 0x12, 0x00, 0x00000000, PPC_FLOAT, PPC_NONE),
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GEN_HANDLER_E_2(mffsce, 0x3F, 0x07, 0x12, 0x01, 0x00000000, PPC_FLOAT,
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PPC2_ISA300),
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GEN_HANDLER_E_2(mffsl, 0x3F, 0x07, 0x12, 0x18, 0x00000000, PPC_FLOAT,
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PPC2_ISA300),
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GEN_HANDLER_E_2(mffscrn, 0x3F, 0x07, 0x12, 0x16, 0x00000000, PPC_FLOAT,
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