mirror of https://github.com/proxmox/mirror_qemu
target-sh4: Introduce SuperHCPU subclasses
Store legacy name in SuperHCPUClass for -cpu ? and for case-insensitive class lookup. List CPUs by iterating over TYPE_SUPERH_CPU subclasses. Signed-off-by: Andreas Färber <afaerber@suse.de>master
Andreas Färber
parent
151d1322a3
commit
c1b382e77d
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@ -24,6 +24,10 @@
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#define TYPE_SUPERH_CPU "superh-cpu"
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#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
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#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
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#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
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#define SUPERH_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
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#define SUPERH_CPU(obj) \
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@ -35,6 +39,7 @@
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* SuperHCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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* @name: The name.
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*
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* A SuperH CPU model.
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*/
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@ -45,6 +50,8 @@ typedef struct SuperHCPUClass {
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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const char *name;
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} SuperHCPUClass;
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/**
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180
target-sh4/cpu.c
180
target-sh4/cpu.c
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@ -54,6 +54,180 @@ static void superh_cpu_reset(CPUState *s)
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set_default_nan_mode(1, &env->fp_status);
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}
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typedef struct SuperHCPUListState {
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fprintf_function cpu_fprintf;
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FILE *file;
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} SuperHCPUListState;
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/* Sort alphabetically by type name. */
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static gint superh_cpu_list_compare(gconstpointer a, gconstpointer b)
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{
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ObjectClass *class_a = (ObjectClass *)a;
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ObjectClass *class_b = (ObjectClass *)b;
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const char *name_a, *name_b;
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name_a = object_class_get_name(class_a);
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name_b = object_class_get_name(class_b);
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return strcmp(name_a, name_b);
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}
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static void superh_cpu_list_entry(gpointer data, gpointer user_data)
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{
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ObjectClass *oc = data;
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SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
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SuperHCPUListState *s = user_data;
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(*s->cpu_fprintf)(s->file, "%s\n",
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scc->name);
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}
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void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
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{
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SuperHCPUListState s = {
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.cpu_fprintf = cpu_fprintf,
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.file = f,
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};
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GSList *list;
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list = object_class_get_list(TYPE_SUPERH_CPU, false);
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list = g_slist_sort(list, superh_cpu_list_compare);
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g_slist_foreach(list, superh_cpu_list_entry, &s);
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g_slist_free(list);
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}
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static gint superh_cpu_name_compare(gconstpointer a, gconstpointer b)
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{
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const SuperHCPUClass *scc = SUPERH_CPU_CLASS(a);
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const char *name = b;
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return strcasecmp(scc->name, name);
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}
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static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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GSList *list, *item;
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if (cpu_model == NULL) {
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return NULL;
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}
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if (strcasecmp(cpu_model, "any") == 0) {
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return object_class_by_name(TYPE_SH7750R_CPU);
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}
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oc = object_class_by_name(cpu_model);
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if (oc != NULL && object_class_dynamic_cast(oc, TYPE_SUPERH_CPU) != NULL
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&& !object_class_is_abstract(oc)) {
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return oc;
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}
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oc = NULL;
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list = object_class_get_list(TYPE_SUPERH_CPU, false);
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item = g_slist_find_custom(list, cpu_model, superh_cpu_name_compare);
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if (item != NULL) {
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oc = item->data;
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}
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g_slist_free(list);
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return oc;
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}
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SuperHCPU *cpu_sh4_init(const char *cpu_model)
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{
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SuperHCPU *cpu;
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CPUSH4State *env;
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ObjectClass *oc;
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oc = superh_cpu_class_by_name(cpu_model);
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if (oc == NULL) {
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return NULL;
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}
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cpu = SUPERH_CPU(object_new(object_class_get_name(oc)));
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env = &cpu->env;
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env->cpu_model_str = cpu_model;
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object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
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return cpu;
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}
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static void sh7750r_cpu_initfn(Object *obj)
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{
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SuperHCPU *cpu = SUPERH_CPU(obj);
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CPUSH4State *env = &cpu->env;
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env->id = SH_CPU_SH7750R;
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env->pvr = 0x00050000;
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env->prr = 0x00000100;
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env->cvr = 0x00110000;
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env->features = SH_FEATURE_BCR3_AND_BCR4;
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}
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static void sh7750r_class_init(ObjectClass *oc, void *data)
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{
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SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
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scc->name = "SH7750R";
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}
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static const TypeInfo sh7750r_type_info = {
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.name = TYPE_SH7750R_CPU,
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.parent = TYPE_SUPERH_CPU,
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.class_init = sh7750r_class_init,
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.instance_init = sh7750r_cpu_initfn,
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};
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static void sh7751r_cpu_initfn(Object *obj)
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{
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SuperHCPU *cpu = SUPERH_CPU(obj);
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CPUSH4State *env = &cpu->env;
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env->id = SH_CPU_SH7751R;
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env->pvr = 0x04050005;
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env->prr = 0x00000113;
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env->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
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env->features = SH_FEATURE_BCR3_AND_BCR4;
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}
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static void sh7751r_class_init(ObjectClass *oc, void *data)
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{
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SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
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scc->name = "SH7751R";
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}
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static const TypeInfo sh7751r_type_info = {
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.name = TYPE_SH7751R_CPU,
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.parent = TYPE_SUPERH_CPU,
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.class_init = sh7751r_class_init,
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.instance_init = sh7751r_cpu_initfn,
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};
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static void sh7785_cpu_initfn(Object *obj)
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{
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SuperHCPU *cpu = SUPERH_CPU(obj);
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CPUSH4State *env = &cpu->env;
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env->id = SH_CPU_SH7785;
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env->pvr = 0x10300700;
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env->prr = 0x00000200;
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env->cvr = 0x71440211;
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env->features = SH_FEATURE_SH4A;
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}
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static void sh7785_class_init(ObjectClass *oc, void *data)
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{
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SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
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scc->name = "SH7785";
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}
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static const TypeInfo sh7785_type_info = {
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.name = TYPE_SH7785_CPU,
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.parent = TYPE_SUPERH_CPU,
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.class_init = sh7785_class_init,
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.instance_init = sh7785_cpu_initfn,
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};
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static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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SuperHCPU *cpu = SUPERH_CPU(dev);
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@ -98,6 +272,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
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scc->parent_reset = cc->reset;
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cc->reset = superh_cpu_reset;
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cc->class_by_name = superh_cpu_class_by_name;
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dc->vmsd = &vmstate_sh_cpu;
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}
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@ -106,7 +281,7 @@ static const TypeInfo superh_cpu_type_info = {
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.parent = TYPE_CPU,
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.instance_size = sizeof(SuperHCPU),
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.instance_init = superh_cpu_initfn,
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.abstract = false,
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.abstract = true,
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.class_size = sizeof(SuperHCPUClass),
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.class_init = superh_cpu_class_init,
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};
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@ -114,6 +289,9 @@ static const TypeInfo superh_cpu_type_info = {
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static void superh_cpu_register_types(void)
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{
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type_register_static(&superh_cpu_type_info);
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type_register_static(&sh7750r_type_info);
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type_register_static(&sh7751r_type_info);
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type_register_static(&sh7785_type_info);
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}
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type_init(superh_cpu_register_types)
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@ -175,90 +175,6 @@ void cpu_dump_state(CPUSH4State * env, FILE * f,
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}
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}
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typedef struct {
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const char *name;
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int id;
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uint32_t pvr;
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uint32_t prr;
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uint32_t cvr;
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uint32_t features;
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} sh4_def_t;
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static sh4_def_t sh4_defs[] = {
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{
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.name = "SH7750R",
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.id = SH_CPU_SH7750R,
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.pvr = 0x00050000,
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.prr = 0x00000100,
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.cvr = 0x00110000,
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.features = SH_FEATURE_BCR3_AND_BCR4,
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}, {
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.name = "SH7751R",
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.id = SH_CPU_SH7751R,
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.pvr = 0x04050005,
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.prr = 0x00000113,
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.cvr = 0x00110000, /* Neutered caches, should be 0x20480000 */
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.features = SH_FEATURE_BCR3_AND_BCR4,
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}, {
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.name = "SH7785",
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.id = SH_CPU_SH7785,
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.pvr = 0x10300700,
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.prr = 0x00000200,
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.cvr = 0x71440211,
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.features = SH_FEATURE_SH4A,
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},
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};
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static const sh4_def_t *cpu_sh4_find_by_name(const char *name)
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{
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int i;
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if (strcasecmp(name, "any") == 0)
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return &sh4_defs[0];
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for (i = 0; i < ARRAY_SIZE(sh4_defs); i++)
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if (strcasecmp(name, sh4_defs[i].name) == 0)
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return &sh4_defs[i];
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return NULL;
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}
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void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(sh4_defs); i++)
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(*cpu_fprintf)(f, "%s\n", sh4_defs[i].name);
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}
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static void cpu_register(CPUSH4State *env, const sh4_def_t *def)
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{
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env->pvr = def->pvr;
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env->prr = def->prr;
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env->cvr = def->cvr;
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env->id = def->id;
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}
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SuperHCPU *cpu_sh4_init(const char *cpu_model)
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{
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SuperHCPU *cpu;
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CPUSH4State *env;
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const sh4_def_t *def;
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def = cpu_sh4_find_by_name(cpu_model);
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if (!def)
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return NULL;
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cpu = SUPERH_CPU(object_new(TYPE_SUPERH_CPU));
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env = &cpu->env;
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env->features = def->features;
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env->cpu_model_str = cpu_model;
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cpu_register(env, def);
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object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
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return cpu;
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}
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static void gen_goto_tb(DisasContext * ctx, int n, target_ulong dest)
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{
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TranslationBlock *tb;
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