mirror of https://github.com/proxmox/mirror_qemu
hw/timer/puv3_ost.c: Switch to transaction-based ptimer API
Switch the puv3_ost code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20191017132905.5604-2-peter.maydell@linaro.orgmaster
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a1f9a907ea
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c54dd4b701
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@ -13,7 +13,6 @@
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#include "hw/sysbus.h"
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#include "hw/sysbus.h"
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#include "hw/irq.h"
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#include "hw/irq.h"
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#include "hw/ptimer.h"
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#include "hw/ptimer.h"
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#include "qemu/main-loop.h"
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#include "qemu/module.h"
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#include "qemu/module.h"
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#undef DEBUG_PUV3
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#undef DEBUG_PUV3
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@ -27,7 +26,6 @@ typedef struct PUV3OSTState {
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SysBusDevice parent_obj;
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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MemoryRegion iomem;
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QEMUBH *bh;
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qemu_irq irq;
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qemu_irq irq;
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ptimer_state *ptimer;
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ptimer_state *ptimer;
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@ -68,6 +66,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset,
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DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
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DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
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switch (offset) {
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switch (offset) {
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case 0x00: /* Match Register 0 */
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case 0x00: /* Match Register 0 */
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ptimer_transaction_begin(s->ptimer);
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s->reg_OSMR0 = value;
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s->reg_OSMR0 = value;
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if (s->reg_OSMR0 > s->reg_OSCR) {
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if (s->reg_OSMR0 > s->reg_OSCR) {
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ptimer_set_count(s->ptimer, s->reg_OSMR0 - s->reg_OSCR);
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ptimer_set_count(s->ptimer, s->reg_OSMR0 - s->reg_OSCR);
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@ -76,6 +75,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset,
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(0xffffffff - s->reg_OSCR));
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(0xffffffff - s->reg_OSCR));
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}
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}
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ptimer_run(s->ptimer, 2);
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ptimer_run(s->ptimer, 2);
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ptimer_transaction_commit(s->ptimer);
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break;
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break;
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case 0x14: /* Status Register */
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case 0x14: /* Status Register */
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assert(value == 0);
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assert(value == 0);
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@ -128,9 +128,10 @@ static void puv3_ost_realize(DeviceState *dev, Error **errp)
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sysbus_init_irq(sbd, &s->irq);
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sysbus_init_irq(sbd, &s->irq);
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s->bh = qemu_bh_new(puv3_ost_tick, s);
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s->ptimer = ptimer_init(puv3_ost_tick, s, PTIMER_POLICY_DEFAULT);
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s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);
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ptimer_transaction_begin(s->ptimer);
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ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
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ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
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ptimer_transaction_commit(s->ptimer);
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memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",
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memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",
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PUV3_REGS_OFFSET);
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PUV3_REGS_OFFSET);
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