mirror of https://github.com/proxmox/mirror_qemu
target-mips: Sign-extend the result of LWR
Sign-extend the result of LWR, as is already done for LWL. This is necessary in the case where LWR loads the full word (i.e. the address is actually aligned). In the other cases, it is implementation defined whether the upper 32 bits of the result are unchanged or a copy of bit 31. The latter seems easier to implement. Previously the code used: (oldval & (0xfffffffe << (31 - bitshift))) | (newval >> bitshift) which zeroed the upper bits of the register, losing any previous sign extension in the unaligned cases. Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>master
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c728154bbb
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@ -1745,6 +1745,7 @@ static void gen_ld(DisasContext *ctx, uint32_t opc,
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tcg_temp_free(t2);
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tcg_gen_or_tl(t0, t0, t1);
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tcg_temp_free(t1);
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tcg_gen_ext32s_tl(t0, t0);
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gen_store_gpr(t0, rt);
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opn = "lwr";
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break;
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