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ppc4xx: Rename ppc405-ebc to ppc4xx-ebc 

This device is shared between different 4xx socs.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <63d9b14c8ff5f73e35bffca1036394b5235735ee.1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
master
BALATON Zoltan 2022-08-17 17:08:33 +02:00 committed by Daniel Henrique Barboza
parent 127ba8d03e
commit cba58aa762
5 changed files with 12 additions and 12 deletions
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2
hw/ppc/ppc405.h
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@ -214,7 +214,7 @@ struct Ppc405SoCState {
Ppc405OcmState ocm;
Ppc405GpioState gpio;
Ppc405DmaState dma;
Ppc405EbcState ebc;
Ppc4xxEbcState ebc;
Ppc405OpbaState opba;
Ppc405PobState pob;
Ppc4xxPlbState plb;

2
hw/ppc/ppc405_uc.c
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@ -1094,7 +1094,7 @@ static void ppc405_soc_instance_init(Object *obj)
object_initialize_child(obj, "dma", &s->dma, TYPE_PPC405_DMA);
object_initialize_child(obj, "ebc", &s->ebc, TYPE_PPC405_EBC);
object_initialize_child(obj, "ebc", &s->ebc, TYPE_PPC4xx_EBC);
object_initialize_child(obj, "opba", &s->opba, TYPE_PPC405_OPBA);

12
hw/ppc/ppc4xx_devs.c
View File

@ -756,7 +756,7 @@ enum {
static uint32_t dcr_read_ebc(void *opaque, int dcrn)
{
Ppc405EbcState *ebc = opaque;
Ppc4xxEbcState *ebc = opaque;
uint32_t ret;
switch (dcrn) {
@ -840,7 +840,7 @@ static uint32_t dcr_read_ebc(void *opaque, int dcrn)
static void dcr_write_ebc(void *opaque, int dcrn, uint32_t val)
{
Ppc405EbcState *ebc = opaque;
Ppc4xxEbcState *ebc = opaque;
switch (dcrn) {
case EBC0_CFGADDR:
@ -899,7 +899,7 @@ static void dcr_write_ebc(void *opaque, int dcrn, uint32_t val)
static void ppc405_ebc_reset(DeviceState *dev)
{
Ppc405EbcState *ebc = PPC405_EBC(dev);
Ppc4xxEbcState *ebc = PPC4xx_EBC(dev);
int i;
ebc->addr = 0x00000000;
@ -916,7 +916,7 @@ static void ppc405_ebc_reset(DeviceState *dev)
static void ppc405_ebc_realize(DeviceState *dev, Error **errp)
{
Ppc405EbcState *ebc = PPC405_EBC(dev);
Ppc4xxEbcState *ebc = PPC4xx_EBC(dev);
Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev);
ppc4xx_dcr_register(dcr, EBC0_CFGADDR, ebc, &dcr_read_ebc, &dcr_write_ebc);
@ -975,9 +975,9 @@ static const TypeInfo ppc4xx_types[] = {
.instance_size = sizeof(Ppc4xxPlbState),
.class_init = ppc405_plb_class_init,
}, {
.name = TYPE_PPC405_EBC,
.name = TYPE_PPC4xx_EBC,
.parent = TYPE_PPC4xx_DCR_DEVICE,
.instance_size = sizeof(Ppc405EbcState),
.instance_size = sizeof(Ppc4xxEbcState),
.class_init = ppc405_ebc_class_init,
}, {
.name = TYPE_PPC4xx_DCR_DEVICE,

2
hw/ppc/sam460ex.c
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@ -372,7 +372,7 @@ static void sam460ex_init(MachineState *machine)
qdev_get_gpio_in(uic[0], 3));
/* External bus controller */
dev = qdev_new(TYPE_PPC405_EBC);
dev = qdev_new(TYPE_PPC4xx_EBC);
ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
object_unref(OBJECT(dev));

6
include/hw/ppc/ppc4xx.h
View File

@ -95,9 +95,9 @@ struct Ppc4xxPlbState {
};
/* Peripheral controller */
#define TYPE_PPC405_EBC "ppc405-ebc"
OBJECT_DECLARE_SIMPLE_TYPE(Ppc405EbcState, PPC405_EBC);
struct Ppc405EbcState {
#define TYPE_PPC4xx_EBC "ppc4xx-ebc"
OBJECT_DECLARE_SIMPLE_TYPE(Ppc4xxEbcState, PPC4xx_EBC);
struct Ppc4xxEbcState {
Ppc4xxDcrDeviceState parent_obj;
uint32_t addr;