mirror of https://github.com/proxmox/mirror_qemu
ppc4xx: Rename ppc405-ebc to ppc4xx-ebc
This device is shared between different 4xx socs. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <63d9b14c8ff5f73e35bffca1036394b5235735ee.1660746880.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>master
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127ba8d03e
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cba58aa762
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@ -214,7 +214,7 @@ struct Ppc405SoCState {
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Ppc405OcmState ocm;
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Ppc405OcmState ocm;
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Ppc405GpioState gpio;
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Ppc405GpioState gpio;
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Ppc405DmaState dma;
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Ppc405DmaState dma;
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Ppc405EbcState ebc;
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Ppc4xxEbcState ebc;
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Ppc405OpbaState opba;
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Ppc405OpbaState opba;
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Ppc405PobState pob;
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Ppc405PobState pob;
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Ppc4xxPlbState plb;
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Ppc4xxPlbState plb;
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@ -1094,7 +1094,7 @@ static void ppc405_soc_instance_init(Object *obj)
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object_initialize_child(obj, "dma", &s->dma, TYPE_PPC405_DMA);
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object_initialize_child(obj, "dma", &s->dma, TYPE_PPC405_DMA);
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object_initialize_child(obj, "ebc", &s->ebc, TYPE_PPC405_EBC);
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object_initialize_child(obj, "ebc", &s->ebc, TYPE_PPC4xx_EBC);
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object_initialize_child(obj, "opba", &s->opba, TYPE_PPC405_OPBA);
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object_initialize_child(obj, "opba", &s->opba, TYPE_PPC405_OPBA);
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@ -756,7 +756,7 @@ enum {
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static uint32_t dcr_read_ebc(void *opaque, int dcrn)
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static uint32_t dcr_read_ebc(void *opaque, int dcrn)
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{
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{
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Ppc405EbcState *ebc = opaque;
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Ppc4xxEbcState *ebc = opaque;
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uint32_t ret;
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uint32_t ret;
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switch (dcrn) {
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switch (dcrn) {
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@ -840,7 +840,7 @@ static uint32_t dcr_read_ebc(void *opaque, int dcrn)
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static void dcr_write_ebc(void *opaque, int dcrn, uint32_t val)
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static void dcr_write_ebc(void *opaque, int dcrn, uint32_t val)
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{
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{
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Ppc405EbcState *ebc = opaque;
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Ppc4xxEbcState *ebc = opaque;
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switch (dcrn) {
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switch (dcrn) {
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case EBC0_CFGADDR:
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case EBC0_CFGADDR:
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@ -899,7 +899,7 @@ static void dcr_write_ebc(void *opaque, int dcrn, uint32_t val)
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static void ppc405_ebc_reset(DeviceState *dev)
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static void ppc405_ebc_reset(DeviceState *dev)
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{
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{
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Ppc405EbcState *ebc = PPC405_EBC(dev);
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Ppc4xxEbcState *ebc = PPC4xx_EBC(dev);
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int i;
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int i;
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ebc->addr = 0x00000000;
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ebc->addr = 0x00000000;
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@ -916,7 +916,7 @@ static void ppc405_ebc_reset(DeviceState *dev)
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static void ppc405_ebc_realize(DeviceState *dev, Error **errp)
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static void ppc405_ebc_realize(DeviceState *dev, Error **errp)
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{
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{
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Ppc405EbcState *ebc = PPC405_EBC(dev);
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Ppc4xxEbcState *ebc = PPC4xx_EBC(dev);
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Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev);
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Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev);
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ppc4xx_dcr_register(dcr, EBC0_CFGADDR, ebc, &dcr_read_ebc, &dcr_write_ebc);
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ppc4xx_dcr_register(dcr, EBC0_CFGADDR, ebc, &dcr_read_ebc, &dcr_write_ebc);
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@ -975,9 +975,9 @@ static const TypeInfo ppc4xx_types[] = {
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.instance_size = sizeof(Ppc4xxPlbState),
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.instance_size = sizeof(Ppc4xxPlbState),
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.class_init = ppc405_plb_class_init,
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.class_init = ppc405_plb_class_init,
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}, {
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}, {
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.name = TYPE_PPC405_EBC,
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.name = TYPE_PPC4xx_EBC,
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.parent = TYPE_PPC4xx_DCR_DEVICE,
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.parent = TYPE_PPC4xx_DCR_DEVICE,
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.instance_size = sizeof(Ppc405EbcState),
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.instance_size = sizeof(Ppc4xxEbcState),
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.class_init = ppc405_ebc_class_init,
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.class_init = ppc405_ebc_class_init,
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}, {
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}, {
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.name = TYPE_PPC4xx_DCR_DEVICE,
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.name = TYPE_PPC4xx_DCR_DEVICE,
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@ -372,7 +372,7 @@ static void sam460ex_init(MachineState *machine)
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qdev_get_gpio_in(uic[0], 3));
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qdev_get_gpio_in(uic[0], 3));
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/* External bus controller */
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/* External bus controller */
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dev = qdev_new(TYPE_PPC405_EBC);
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dev = qdev_new(TYPE_PPC4xx_EBC);
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ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
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ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
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object_unref(OBJECT(dev));
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object_unref(OBJECT(dev));
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@ -95,9 +95,9 @@ struct Ppc4xxPlbState {
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};
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};
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/* Peripheral controller */
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/* Peripheral controller */
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#define TYPE_PPC405_EBC "ppc405-ebc"
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#define TYPE_PPC4xx_EBC "ppc4xx-ebc"
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OBJECT_DECLARE_SIMPLE_TYPE(Ppc405EbcState, PPC405_EBC);
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OBJECT_DECLARE_SIMPLE_TYPE(Ppc4xxEbcState, PPC4xx_EBC);
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struct Ppc405EbcState {
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struct Ppc4xxEbcState {
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Ppc4xxDcrDeviceState parent_obj;
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Ppc4xxDcrDeviceState parent_obj;
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uint32_t addr;
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uint32_t addr;
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