mirror of https://github.com/proxmox/mirror_qemu
SCI fixes
(Anthony Liguori) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4081 c046a42c-6fe2-441c-8c8c-71466251a162master
parent
7852e5da32
commit
cf7a2fe2eb
21
hw/acpi.c
21
hw/acpi.c
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@ -49,6 +49,7 @@ typedef struct PIIX4PMState {
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uint8_t smb_data1;
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uint8_t smb_data1;
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uint8_t smb_data[32];
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uint8_t smb_data[32];
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uint8_t smb_index;
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uint8_t smb_index;
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qemu_irq irq;
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} PIIX4PMState;
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} PIIX4PMState;
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#define RTC_EN (1 << 10)
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#define RTC_EN (1 << 10)
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@ -71,6 +72,8 @@ typedef struct PIIX4PMState {
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#define SMBHSTDAT1 0x06
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#define SMBHSTDAT1 0x06
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#define SMBBLKDAT 0x07
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#define SMBBLKDAT 0x07
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PIIX4PMState *pm_state;
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static uint32_t get_pmtmr(PIIX4PMState *s)
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static uint32_t get_pmtmr(PIIX4PMState *s)
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{
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{
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uint32_t d;
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uint32_t d;
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@ -97,11 +100,12 @@ static void pm_update_sci(PIIX4PMState *s)
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pmsts = get_pmsts(s);
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pmsts = get_pmsts(s);
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sci_level = (((pmsts & s->pmen) &
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sci_level = (((pmsts & s->pmen) &
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(RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0);
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(RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN)) != 0);
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qemu_set_irq(s->dev.irq[0], sci_level);
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qemu_set_irq(s->irq, sci_level);
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/* schedule a timer interruption if needed */
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/* schedule a timer interruption if needed */
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if ((s->pmen & TMROF_EN) && !(pmsts & TMROF_EN)) {
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if ((s->pmen & TMROF_EN) && !(pmsts & TMROF_EN)) {
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expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec, PM_FREQ);
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expire_time = muldiv64(s->tmr_overflow_time, ticks_per_sec, PM_FREQ);
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qemu_mod_timer(s->tmr_timer, expire_time);
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qemu_mod_timer(s->tmr_timer, expire_time);
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s->tmr_overflow_time += 0x800000;
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} else {
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} else {
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qemu_del_timer(s->tmr_timer);
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qemu_del_timer(s->tmr_timer);
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}
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}
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@ -467,7 +471,8 @@ static int pm_load(QEMUFile* f,void* opaque,int version_id)
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return 0;
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return 0;
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}
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}
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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qemu_irq sci_irq)
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{
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{
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PIIX4PMState *s;
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PIIX4PMState *s;
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uint8_t *pci_conf;
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uint8_t *pci_conf;
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@ -475,6 +480,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
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s = (PIIX4PMState *)pci_register_device(bus,
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s = (PIIX4PMState *)pci_register_device(bus,
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"PM", sizeof(PIIX4PMState),
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"PM", sizeof(PIIX4PMState),
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devfn, NULL, pm_write_config);
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devfn, NULL, pm_write_config);
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pm_state = s;
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pci_conf = s->dev.config;
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pci_conf = s->dev.config;
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pci_conf[0x00] = 0x86;
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pci_conf[0x00] = 0x86;
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pci_conf[0x01] = 0x80;
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pci_conf[0x01] = 0x80;
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@ -514,5 +520,16 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
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register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s);
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register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s);
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s->smbus = i2c_init_bus();
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s->smbus = i2c_init_bus();
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s->irq = sci_irq;
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return s->smbus;
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return s->smbus;
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}
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}
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#if defined(TARGET_I386)
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void qemu_system_powerdown(void)
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{
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if(pm_state->pmen & PWRBTN_EN) {
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pm_state->pmsts |= PWRBTN_EN;
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pm_update_sci(pm_state);
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}
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}
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#endif
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@ -905,7 +905,7 @@ void mips_malta_init (int ram_size, int vga_ram_size,
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piix4_devfn = piix4_init(pci_bus, 80);
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piix4_devfn = piix4_init(pci_bus, 80);
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pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259);
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pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259);
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usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
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usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
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smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100);
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smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, i8259[9]);
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eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
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eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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/* TODO: Populate SPD eeprom data. */
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/* TODO: Populate SPD eeprom data. */
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2
hw/pc.c
2
hw/pc.c
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@ -981,7 +981,7 @@ static void pc_init1(int ram_size, int vga_ram_size,
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i2c_bus *smbus;
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i2c_bus *smbus;
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/* TODO: Populate SPD eeprom data. */
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/* TODO: Populate SPD eeprom data. */
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smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100);
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smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
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smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
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}
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}
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3
hw/pc.h
3
hw/pc.h
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@ -88,7 +88,8 @@ int ioport_get_a20(void);
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/* acpi.c */
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/* acpi.c */
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extern int acpi_enabled;
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extern int acpi_enabled;
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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qemu_irq sci_irq);
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void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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void acpi_bios_init(void);
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void acpi_bios_init(void);
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@ -220,7 +220,6 @@ static void piix3_set_irq(qemu_irq *pic, int irq_num, int level)
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{
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{
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int i, pic_irq, pic_level;
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int i, pic_irq, pic_level;
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piix3_dev->config[0x60 + irq_num] &= ~0x80; // enable bit
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pci_irq_levels[irq_num] = level;
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pci_irq_levels[irq_num] = level;
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/* now we change the pic irq level according to the piix irq mappings */
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/* now we change the pic irq level according to the piix irq mappings */
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6
sysemu.h
6
sysemu.h
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@ -30,12 +30,16 @@ void cpu_disable_ticks(void);
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void qemu_system_reset_request(void);
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void qemu_system_reset_request(void);
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void qemu_system_shutdown_request(void);
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void qemu_system_shutdown_request(void);
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void qemu_system_powerdown_request(void);
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void qemu_system_powerdown_request(void);
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#if !defined(TARGET_SPARC)
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int qemu_shutdown_requested(void);
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int qemu_reset_requested(void);
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int qemu_powerdown_requested(void);
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#if !defined(TARGET_SPARC) && !defined(TARGET_I386)
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// Please implement a power failure function to signal the OS
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// Please implement a power failure function to signal the OS
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#define qemu_system_powerdown() do{}while(0)
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#define qemu_system_powerdown() do{}while(0)
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#else
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#else
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void qemu_system_powerdown(void);
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void qemu_system_powerdown(void);
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#endif
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#endif
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void qemu_system_reset(void);
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void cpu_save(QEMUFile *f, void *opaque);
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void cpu_save(QEMUFile *f, void *opaque);
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int cpu_load(QEMUFile *f, void *opaque, int version_id);
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int cpu_load(QEMUFile *f, void *opaque, int version_id);
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23
vl.c
23
vl.c
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@ -7306,6 +7306,27 @@ static int reset_requested;
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static int shutdown_requested;
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static int shutdown_requested;
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static int powerdown_requested;
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static int powerdown_requested;
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int qemu_shutdown_requested(void)
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{
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int r = shutdown_requested;
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shutdown_requested = 0;
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return r;
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}
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int qemu_reset_requested(void)
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{
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int r = reset_requested;
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reset_requested = 0;
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return r;
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}
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int qemu_powerdown_requested(void)
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{
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int r = powerdown_requested;
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powerdown_requested = 0;
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return r;
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}
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void qemu_register_reset(QEMUResetHandler *func, void *opaque)
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void qemu_register_reset(QEMUResetHandler *func, void *opaque)
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{
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{
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QEMUResetEntry **pre, *re;
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QEMUResetEntry **pre, *re;
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@ -7320,7 +7341,7 @@ void qemu_register_reset(QEMUResetHandler *func, void *opaque)
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*pre = re;
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*pre = re;
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}
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}
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static void qemu_system_reset(void)
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void qemu_system_reset(void)
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{
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{
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QEMUResetEntry *re;
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QEMUResetEntry *re;
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