From d1b31428fd522b725bc053c84b5fbc8764061363 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 7 Feb 2020 14:04:26 +0000 Subject: [PATCH] target/arm: Update arm_phys_excp_target_el for TGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The TGE bit routes all asynchronous exceptions to EL2. Tested-by: Alex Bennée Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20200206105448.4726-33-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index 3b7b459314..56a62b11d0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8446,6 +8446,12 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, break; }; + /* + * For these purposes, TGE and AMO/IMO/FMO both force the + * interrupt to EL2. Fold TGE into the bit extracted above. + */ + hcr |= (hcr_el2 & HCR_TGE) != 0; + /* Perform a table-lookup for the target EL given the current state */ target_el = target_el_table[is64][scr][rw][hcr][secure][cur_el];