mirror of https://github.com/proxmox/mirror_qemu
Add MSR bits signification per PowerPC implementation flags (to be continued).
As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162master
j_mayer
parent
7875ed20d7
commit
d26bfc9a1b
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@ -347,40 +347,37 @@ union ppc_tlb_t {
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#define MSR_CM 31 /* Computation mode for BookE hflags */
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#define MSR_ICM 30 /* Interrupt computation mode for BookE */
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#define MSR_UCLE 26 /* User-mode cache lock enable for BookE */
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#define MSR_VR 25 /* altivec available hflags */
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#define MSR_SPE 25 /* SPE enable for BookE hflags */
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#define MSR_VR 25 /* altivec available x hflags */
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#define MSR_SPE 25 /* SPE enable for BookE x hflags */
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#define MSR_AP 23 /* Access privilege state on 602 hflags */
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#define MSR_SA 22 /* Supervisor access mode on 602 hflags */
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#define MSR_KEY 19 /* key bit on 603e */
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#define MSR_POW 18 /* Power management */
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#define MSR_WE 18 /* Wait state enable on embedded PowerPC */
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#define MSR_TGPR 17 /* TGPR usage on 602/603 */
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#define MSR_TLB 17 /* TLB update on ? */
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#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC */
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#define MSR_POW 18 /* Power management x */
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#define MSR_WE 18 /* Wait state enable on embedded PowerPC x */
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#define MSR_TGPR 17 /* TGPR usage on 602/603 x */
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#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC x */
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#define MSR_ILE 16 /* Interrupt little-endian mode */
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#define MSR_EE 15 /* External interrupt enable */
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#define MSR_PR 14 /* Problem state hflags */
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#define MSR_FP 13 /* Floating point available hflags */
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#define MSR_ME 12 /* Machine check interrupt enable */
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#define MSR_FE0 11 /* Floating point exception mode 0 hflags */
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#define MSR_SE 10 /* Single-step trace enable hflags */
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#define MSR_DWE 10 /* Debug wait enable on 405 */
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#define MSR_UBLE 10 /* User BTB lock enable on e500 */
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#define MSR_BE 9 /* Branch trace enable hflags */
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#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC */
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#define MSR_SE 10 /* Single-step trace enable x hflags */
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#define MSR_DWE 10 /* Debug wait enable on 405 x */
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#define MSR_UBLE 10 /* User BTB lock enable on e500 x */
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#define MSR_BE 9 /* Branch trace enable x hflags */
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#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC x */
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#define MSR_FE1 8 /* Floating point exception mode 1 hflags */
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#define MSR_AL 7 /* AL bit on POWER */
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#define MSR_IP 6 /* Interrupt prefix */
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#define MSR_IR 5 /* Instruction relocate */
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#define MSR_IS 5 /* Instruction address space on embedded PowerPC */
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#define MSR_DR 4 /* Data relocate */
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#define MSR_DS 4 /* Data address space on embedded PowerPC */
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#define MSR_PE 3 /* Protection enable on 403 */
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#define MSR_EP 3 /* Exception prefix on 601 */
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#define MSR_PX 2 /* Protection exclusive on 403 */
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#define MSR_PMM 2 /* Performance monitor mark on POWER */
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#define MSR_RI 1 /* Recoverable interrupt */
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#define MSR_LE 0 /* Little-endian mode hflags */
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#define MSR_PE 3 /* Protection enable on 403 x */
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#define MSR_EP 3 /* Exception prefix on 601 x */
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#define MSR_PX 2 /* Protection exclusive on 403 x */
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#define MSR_PMM 2 /* Performance monitor mark on POWER x */
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#define MSR_RI 1 /* Recoverable interrupt 1 */
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#define MSR_LE 0 /* Little-endian mode 1 hflags */
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#define msr_sf env->msr[MSR_SF]
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#define msr_isf env->msr[MSR_ISF]
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#define msr_hv env->msr[MSR_HV]
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@ -395,7 +392,6 @@ union ppc_tlb_t {
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#define msr_pow env->msr[MSR_POW]
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#define msr_we env->msr[MSR_WE]
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#define msr_tgpr env->msr[MSR_TGPR]
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#define msr_tlb env->msr[MSR_TLB]
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#define msr_ce env->msr[MSR_CE]
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#define msr_ile env->msr[MSR_ILE]
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#define msr_ee env->msr[MSR_EE]
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@ -412,9 +408,7 @@ union ppc_tlb_t {
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#define msr_al env->msr[MSR_AL]
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#define msr_ip env->msr[MSR_IP]
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#define msr_ir env->msr[MSR_IR]
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#define msr_is env->msr[MSR_IS]
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#define msr_dr env->msr[MSR_DR]
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#define msr_ds env->msr[MSR_DS]
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#define msr_pe env->msr[MSR_PE]
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#define msr_ep env->msr[MSR_EP]
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#define msr_px env->msr[MSR_PX]
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@ -422,6 +416,33 @@ union ppc_tlb_t {
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#define msr_ri env->msr[MSR_RI]
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#define msr_le env->msr[MSR_LE]
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enum {
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/* Beware that MSR bits are given using IBM standard (ie MSB is 0 !) */
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POWERPC_FLAG_NONE = 0x00000000,
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/* Flag for MSR bit 25 signification (VRE/SPE) */
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POWERPC_FLAG_SPE = 0x00000001,
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POWERPC_FLAG_VRE = 0x00000002,
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/* Flag for MSR bit 18 may not be needed... */
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POWERPC_FLAG_POW = 0x00000004,
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POWERPC_FLAG_WE = 0x00000008,
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/* Flag for MSR bit 17 signification (TGPR/CE) */
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POWERPC_FLAG_TGPR = 0x00000010,
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POWERPC_FLAG_CE = 0x00000020,
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/* Flag for MSR bit 10 signification (SE/DWE/UBLE) */
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POWERPC_FLAG_SE = 0x00000040,
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POWERPC_FLAG_DWE = 0x00000080,
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POWERPC_FLAG_UBLE = 0x00000100,
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/* Flag for MSR bit 9 signification (BE/DE) */
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POWERPC_FLAG_BE = 0x00000200,
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POWERPC_FLAG_DE = 0x00000400,
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/* Flag for MSR bit 3 signification (PE/EP) */
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POWERPC_FLAG_PE = 0x00000800,
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POWERPC_FLAG_EP = 0x00001000,
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/* Flag for MSR but 2 signification (PX/PMM) */
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POWERPC_FLAG_PX = 0x00002000,
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POWERPC_FLAG_PMM = 0x00004000,
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};
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/*****************************************************************************/
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/* The whole PowerPC CPU context */
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struct CPUPPCState {
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@ -1183,7 +1183,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
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prot = (tlb->prot >> 4) & 0xF;
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/* Check the address space */
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if (access_type == ACCESS_CODE) {
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if (msr_is != (tlb->attr & 1))
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if (msr_ir != (tlb->attr & 1))
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continue;
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ctx->prot = prot;
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if (prot & PAGE_EXEC) {
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@ -1192,7 +1192,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
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}
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ret = -3;
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} else {
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if (msr_ds != (tlb->attr & 1))
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if (msr_dr != (tlb->attr & 1))
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continue;
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ctx->prot = prot;
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if ((!rw && prot & PAGE_READ) || (rw && (prot & PAGE_WRITE))) {
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@ -1964,7 +1964,7 @@ target_ulong do_load_msr (CPUPPCState *env)
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((target_ulong)msr_sa << MSR_SA) |
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((target_ulong)msr_key << MSR_KEY) |
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((target_ulong)msr_pow << MSR_POW) | /* POW / WE */
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((target_ulong)msr_tlb << MSR_TLB) | /* TLB / TGPE / CE */
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((target_ulong)msr_tgpr << MSR_TGPR) | /* TGPR / CE */
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((target_ulong)msr_ile << MSR_ILE) |
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((target_ulong)msr_ee << MSR_EE) |
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((target_ulong)msr_pr << MSR_PR) |
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@ -2000,18 +2000,10 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
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fprintf(logfile, "%s: T0 %08lx\n", __func__, value);
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}
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#endif
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switch (env->excp_model) {
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case POWERPC_EXCP_602:
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case POWERPC_EXCP_603:
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case POWERPC_EXCP_603E:
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case POWERPC_EXCP_G2:
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if (((value >> MSR_TGPR) & 1) != msr_tgpr) {
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/* Swap temporary saved registers with GPRs */
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swap_gpr_tgpr(env);
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}
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break;
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default:
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break;
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if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
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((value >> MSR_TGPR) & 1) != msr_tgpr)) {
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/* Swap temporary saved registers with GPRs */
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swap_gpr_tgpr(env);
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}
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#if defined (TARGET_PPC64)
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msr_sf = (value >> MSR_SF) & 1;
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@ -2024,7 +2016,7 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
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msr_sa = (value >> MSR_SA) & 1;
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msr_key = (value >> MSR_KEY) & 1;
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msr_pow = (value >> MSR_POW) & 1; /* POW / WE */
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msr_tlb = (value >> MSR_TLB) & 1; /* TLB / TGPR / CE */
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msr_tgpr = (value >> MSR_TGPR) & 1; /* TGPR / CE */
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msr_ile = (value >> MSR_ILE) & 1;
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msr_ee = (value >> MSR_EE) & 1;
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msr_pr = (value >> MSR_PR) & 1;
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@ -6514,6 +6514,7 @@ static inline int gen_intermediate_code_internal (CPUState *env,
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target_ulong pc_start;
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uint16_t *gen_opc_end;
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int supervisor;
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int single_step, branch_step;
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int j, lj = -1;
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pc_start = tb->pc;
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@ -6545,9 +6546,20 @@ static inline int gen_intermediate_code_internal (CPUState *env,
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ctx.dcache_line_size = env->dcache_line_size;
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ctx.fpu_enabled = msr_fp;
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#if defined(TARGET_PPCEMB)
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ctx.spe_enabled = msr_spe;
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if (env->flags & POWERPC_FLAG_SPE)
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ctx.spe_enabled = msr_spe;
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else
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ctx.spe_enabled = 0;
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#endif
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ctx.singlestep_enabled = env->singlestep_enabled;
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if ((env->flags & POWERPC_FLAG_SE) && msr_se)
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single_step = 1;
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else
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single_step = 0;
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if ((env->flags & POWERPC_FLAG_BE) && msr_be)
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branch_step = 1;
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else
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branch_step = 0;
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ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;;
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#if defined (DO_SINGLE_STEP) && 0
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/* Single step trace mode */
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msr_se = 1;
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@ -6642,30 +6654,24 @@ static inline int gen_intermediate_code_internal (CPUState *env,
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handler->count++;
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#endif
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/* Check trace mode exceptions */
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#if 0 // XXX: buggy on embedded PowerPC
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if (unlikely((msr_be && ctx.exception == POWERPC_EXCP_BRANCH) ||
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/* Check in single step trace mode
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* we need to stop except if:
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* - rfi, trap or syscall
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* - first instruction of an exception handler
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*/
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(msr_se && (ctx.nip < 0x100 ||
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ctx.nip > 0xF00 ||
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(ctx.nip & 0xFC) != 0x04) &&
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#if defined(CONFIG_USER_ONLY)
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ctx.exception != POWERPC_EXCP_SYSCALL_USER &&
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#else
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ctx.exception != POWERPC_EXCP_SYSCALL &&
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#endif
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ctx.exception != POWERPC_EXCP_TRAP))) {
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if (unlikely(branch_step != 0 &&
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ctx.exception == POWERPC_EXCP_BRANCH)) {
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GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
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}
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} else if (unlikely(single_step != 0 &&
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(ctx.nip <= 0x100 || ctx.nip > 0xF00 ||
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(ctx.nip & 0xFC) != 0x04) &&
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#if defined(CONFIG_USER_ONLY)
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ctx.exception != POWERPC_EXCP_SYSCALL_USER &&
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#else
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ctx.exception != POWERPC_EXCP_SYSCALL &&
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#endif
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/* if we reach a page boundary or are single stepping, stop
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* generation
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*/
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if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) ||
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(env->singlestep_enabled))) {
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ctx.exception != POWERPC_EXCP_TRAP)) {
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GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0);
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} else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) ||
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(env->singlestep_enabled))) {
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/* if we reach a page boundary or are single stepping, stop
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* generation
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*/
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break;
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}
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#if defined (DO_SINGLE_STEP)
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@ -39,6 +39,7 @@ struct ppc_def_t {
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uint8_t excp_model;
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uint8_t bus_model;
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uint8_t pad;
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uint32_t flags;
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int bfd_mach;
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void (*init_proc)(CPUPPCState *env);
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};
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@ -2581,6 +2582,7 @@ static void init_excp_970 (CPUPPCState *env)
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#define POWERPC_EXCP_401 (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_401 (PPC_FLAGS_INPUT_401)
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#define POWERPC_BFDM_401 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_401 (POWERPC_FLAG_NONE)
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static void init_proc_401 (CPUPPCState *env)
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{
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@ -2605,6 +2607,7 @@ static void init_proc_401 (CPUPPCState *env)
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#define POWERPC_EXCP_401x2 (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_401x2 (PPC_FLAGS_INPUT_401)
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#define POWERPC_BFDM_401x2 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_401x2 (POWERPC_FLAG_NONE)
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static void init_proc_401x2 (CPUPPCState *env)
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{
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@ -2634,6 +2637,7 @@ static void init_proc_401x2 (CPUPPCState *env)
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#define POWERPC_EXCP_401x3 (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401)
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#define POWERPC_BFDM_401x3 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_401x3 (POWERPC_FLAG_NONE)
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__attribute__ (( unused ))
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static void init_proc_401x3 (CPUPPCState *env)
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@ -2661,6 +2665,7 @@ static void init_proc_401x3 (CPUPPCState *env)
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#define POWERPC_EXCP_IOP480 (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_IOP480 (PPC_FLAGS_INPUT_401)
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#define POWERPC_BFDM_IOP480 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_IOP480 (POWERPC_FLAG_NONE)
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static void init_proc_IOP480 (CPUPPCState *env)
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{
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@ -2689,6 +2694,7 @@ static void init_proc_IOP480 (CPUPPCState *env)
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#define POWERPC_EXCP_403 (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_403 (PPC_FLAGS_INPUT_401)
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#define POWERPC_BFDM_403 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_403 (POWERPC_FLAG_NONE)
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static void init_proc_403 (CPUPPCState *env)
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{
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@ -2717,6 +2723,7 @@ static void init_proc_403 (CPUPPCState *env)
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#define POWERPC_EXCP_403GCX (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_403GCX (PPC_FLAGS_INPUT_401)
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#define POWERPC_BFDM_403GCX (bfd_mach_ppc_403)
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#define POWERPC_FLAG_403GCX (POWERPC_FLAG_NONE)
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static void init_proc_403GCX (CPUPPCState *env)
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{
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@ -2758,6 +2765,7 @@ static void init_proc_403GCX (CPUPPCState *env)
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#define POWERPC_EXCP_405 (POWERPC_EXCP_40x)
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#define POWERPC_INPUT_405 (PPC_FLAGS_INPUT_405)
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#define POWERPC_BFDM_405 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_405 (POWERPC_FLAG_NONE)
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static void init_proc_405 (CPUPPCState *env)
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{
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@ -2797,6 +2805,7 @@ static void init_proc_405 (CPUPPCState *env)
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#define POWERPC_EXCP_440EP (POWERPC_EXCP_BOOKE)
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#define POWERPC_INPUT_440EP (PPC_FLAGS_INPUT_BookE)
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#define POWERPC_BFDM_440EP (bfd_mach_ppc_403)
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#define POWERPC_FLAG_440EP (POWERPC_FLAG_NONE)
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static void init_proc_440EP (CPUPPCState *env)
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{
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@ -2842,6 +2851,7 @@ static void init_proc_440EP (CPUPPCState *env)
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#define POWERPC_EXCP_440GP (POWERPC_EXCP_BOOKE)
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#define POWERPC_INPUT_440GP (PPC_FLAGS_INPUT_BookE)
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#define POWERPC_BFDM_440GP (bfd_mach_ppc_403)
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#define POWERPC_FLAG_440GP (POWERPC_FLAG_NONE)
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static void init_proc_440GP (CPUPPCState *env)
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{
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@ -2869,6 +2879,7 @@ static void init_proc_440GP (CPUPPCState *env)
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#define POWERPC_EXCP_440x4 (POWERPC_EXCP_BOOKE)
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#define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE)
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#define POWERPC_BFDM_440x4 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_440x4 (POWERPC_FLAG_NONE)
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__attribute__ (( unused ))
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static void init_proc_440x4 (CPUPPCState *env)
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@ -2897,6 +2908,7 @@ static void init_proc_440x4 (CPUPPCState *env)
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#define POWERPC_EXCP_440x5 (POWERPC_EXCP_BOOKE)
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#define POWERPC_INPUT_440x5 (PPC_FLAGS_INPUT_BookE)
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#define POWERPC_BFDM_440x5 (bfd_mach_ppc_403)
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#define POWERPC_FLAG_440x5 (POWERPC_FLAG_NONE)
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static void init_proc_440x5 (CPUPPCState *env)
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{
|
||||
|
|
@ -2942,6 +2954,7 @@ static void init_proc_440x5 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_460 (POWERPC_EXCP_BOOKE)
|
||||
#define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE)
|
||||
#define POWERPC_BFDM_460 (bfd_mach_ppc_403)
|
||||
#define POWERPC_FLAG_460 (POWERPC_FLAG_NONE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_460 (CPUPPCState *env)
|
||||
|
|
@ -2996,6 +3009,7 @@ static void init_proc_460 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_460F (POWERPC_EXCP_BOOKE)
|
||||
#define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE)
|
||||
#define POWERPC_BFDM_460F (bfd_mach_ppc_403)
|
||||
#define POWERPC_FLAG_460F (POWERPC_FLAG_NONE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_460F (CPUPPCState *env)
|
||||
|
|
@ -3050,6 +3064,7 @@ static void init_proc_460F (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_BookE (POWERPC_EXCP_BOOKE)
|
||||
#define POWERPC_INPUT_BookE (PPC_FLAGS_INPUT_BookE)
|
||||
#define POWERPC_BFDM_BookE (bfd_mach_ppc_403)
|
||||
#define POWERPC_FLAG_BookE (POWERPC_FLAG_NONE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_BookE (CPUPPCState *env)
|
||||
|
|
@ -3072,6 +3087,7 @@ static void init_proc_BookE (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_e500 (POWERPC_EXCP_40x)
|
||||
#define POWERPC_INPUT_e500 (PPC_FLAGS_INPUT_BookE)
|
||||
#define POWERPC_BFDM_e500 (bfd_mach_ppc_403)
|
||||
#define POWERPC_FLAG_e500 (POWERPC_FLAG_SPE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_e500 (CPUPPCState *env)
|
||||
|
|
@ -3118,6 +3134,7 @@ static void init_proc_e500 (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_601 (POWERPC_EXCP_601)
|
||||
#define POWERPC_INPUT_601 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_601 (bfd_mach_ppc_601)
|
||||
#define POWERPC_FLAG_601 (POWERPC_FLAG_NONE)
|
||||
|
||||
static void init_proc_601 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3171,6 +3188,7 @@ static void init_proc_601 (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_602 (POWERPC_EXCP_602)
|
||||
#define POWERPC_INPUT_602 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_602 (bfd_mach_ppc_602)
|
||||
#define POWERPC_FLAG_602 (POWERPC_FLAG_TGPR)
|
||||
|
||||
static void init_proc_602 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3206,6 +3224,7 @@ static void init_proc_602 (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_603 (POWERPC_EXCP_603)
|
||||
#define POWERPC_INPUT_603 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_603 (bfd_mach_ppc_603)
|
||||
#define POWERPC_FLAG_603 (POWERPC_FLAG_TGPR)
|
||||
|
||||
static void init_proc_603 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3241,6 +3260,7 @@ static void init_proc_603 (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_603E (POWERPC_EXCP_603E)
|
||||
#define POWERPC_INPUT_603E (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_603E (bfd_mach_ppc_ec603e)
|
||||
#define POWERPC_FLAG_603E (POWERPC_FLAG_TGPR)
|
||||
|
||||
static void init_proc_603E (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3281,6 +3301,7 @@ static void init_proc_603E (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_G2 (POWERPC_EXCP_G2)
|
||||
#define POWERPC_INPUT_G2 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_G2 (bfd_mach_ppc_ec603e)
|
||||
#define POWERPC_FLAG_G2 (POWERPC_FLAG_TGPR)
|
||||
|
||||
static void init_proc_G2 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3323,6 +3344,7 @@ static void init_proc_G2 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_G2LE (POWERPC_EXCP_G2)
|
||||
#define POWERPC_INPUT_G2LE (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_G2LE (bfd_mach_ppc_ec603e)
|
||||
#define POWERPC_FLAG_G2LE (POWERPC_FLAG_TGPR)
|
||||
|
||||
static void init_proc_G2LE (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3365,6 +3387,7 @@ static void init_proc_G2LE (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_604 (POWERPC_EXCP_604)
|
||||
#define POWERPC_INPUT_604 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_604 (bfd_mach_ppc_604)
|
||||
#define POWERPC_FLAG_604 (POWERPC_FLAG_NONE)
|
||||
|
||||
static void init_proc_604 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3399,6 +3422,7 @@ static void init_proc_604 (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_7x0 (POWERPC_EXCP_7x0)
|
||||
#define POWERPC_INPUT_7x0 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7x0 (bfd_mach_ppc_750)
|
||||
#define POWERPC_FLAG_7x0 (POWERPC_FLAG_NONE)
|
||||
|
||||
static void init_proc_7x0 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3435,6 +3459,7 @@ static void init_proc_7x0 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_750fx (POWERPC_EXCP_7x0)
|
||||
#define POWERPC_INPUT_750fx (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_750fx (bfd_mach_ppc_750)
|
||||
#define POWERPC_FLAG_750fx (POWERPC_FLAG_NONE)
|
||||
|
||||
static void init_proc_750fx (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3478,6 +3503,7 @@ static void init_proc_750fx (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_7x5 (POWERPC_EXCP_7x5)
|
||||
#define POWERPC_INPUT_7x5 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7x5 (bfd_mach_ppc_750)
|
||||
#define POWERPC_FLAG_7x5 (POWERPC_FLAG_NONE)
|
||||
|
||||
static void init_proc_7x5 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3536,6 +3562,7 @@ static void init_proc_7x5 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_7400 (POWERPC_EXCP_74xx)
|
||||
#define POWERPC_INPUT_7400 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7400 (bfd_mach_ppc_7400)
|
||||
#define POWERPC_FLAG_7400 (POWERPC_FLAG_VRE)
|
||||
|
||||
static void init_proc_7400 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3565,6 +3592,7 @@ static void init_proc_7400 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_7410 (POWERPC_EXCP_74xx)
|
||||
#define POWERPC_INPUT_7410 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7410 (bfd_mach_ppc_7400)
|
||||
#define POWERPC_FLAG_7410 (POWERPC_FLAG_VRE)
|
||||
|
||||
static void init_proc_7410 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -3606,6 +3634,7 @@ static void init_proc_7410 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_7440 (POWERPC_EXCP_74xx)
|
||||
#define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7440 (bfd_mach_ppc_7400)
|
||||
#define POWERPC_FLAG_7440 (POWERPC_FLAG_VRE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_7440 (CPUPPCState *env)
|
||||
|
|
@ -3674,6 +3703,7 @@ static void init_proc_7440 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_7450 (POWERPC_EXCP_74xx)
|
||||
#define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7450 (bfd_mach_ppc_7400)
|
||||
#define POWERPC_FLAG_7450 (POWERPC_FLAG_VRE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_7450 (CPUPPCState *env)
|
||||
|
|
@ -3744,6 +3774,7 @@ static void init_proc_7450 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_7445 (POWERPC_EXCP_74xx)
|
||||
#define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7445 (bfd_mach_ppc_7400)
|
||||
#define POWERPC_FLAG_7445 (POWERPC_FLAG_VRE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_7445 (CPUPPCState *env)
|
||||
|
|
@ -3846,6 +3877,7 @@ static void init_proc_7445 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_7455 (POWERPC_EXCP_74xx)
|
||||
#define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx)
|
||||
#define POWERPC_BFDM_7455 (bfd_mach_ppc_7400)
|
||||
#define POWERPC_FLAG_7455 (POWERPC_FLAG_VRE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_7455 (CPUPPCState *env)
|
||||
|
|
@ -3955,6 +3987,7 @@ static void init_proc_7455 (CPUPPCState *env)
|
|||
//#define POWERPC_EXCP_970 (POWERPC_EXCP_970)
|
||||
#define POWERPC_INPUT_970 (PPC_FLAGS_INPUT_970)
|
||||
#define POWERPC_BFDM_970 (bfd_mach_ppc64)
|
||||
#define POWERPC_FLAG_970 (POWERPC_FLAG_VRE)
|
||||
|
||||
static void init_proc_970 (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -4025,6 +4058,7 @@ static void init_proc_970 (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_970FX (POWERPC_EXCP_970)
|
||||
#define POWERPC_INPUT_970FX (PPC_FLAGS_INPUT_970)
|
||||
#define POWERPC_BFDM_970FX (bfd_mach_ppc64)
|
||||
#define POWERPC_FLAG_970FX (POWERPC_FLAG_VRE)
|
||||
|
||||
static void init_proc_970FX (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -4095,6 +4129,7 @@ static void init_proc_970FX (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_970GX (POWERPC_EXCP_970)
|
||||
#define POWERPC_INPUT_970GX (PPC_FLAGS_INPUT_970)
|
||||
#define POWERPC_BFDM_970GX (bfd_mach_ppc64)
|
||||
#define POWERPC_FLAG_970GX (POWERPC_FLAG_VRE)
|
||||
|
||||
static void init_proc_970GX (CPUPPCState *env)
|
||||
{
|
||||
|
|
@ -4164,6 +4199,7 @@ static void init_proc_970GX (CPUPPCState *env)
|
|||
#define POWERPC_EXCP_620 (POWERPC_EXCP_970)
|
||||
#define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_970)
|
||||
#define POWERPC_BFDM_620 (bfd_mach_ppc64)
|
||||
#define POWERPC_FLAG_620 (POWERPC_FLAG_NONE)
|
||||
|
||||
__attribute__ (( unused ))
|
||||
static void init_proc_620 (CPUPPCState *env)
|
||||
|
|
@ -4197,6 +4233,7 @@ static void init_proc_620 (CPUPPCState *env)
|
|||
#define POWERPC_INPUT_PPC32 POWERPC_INPUT_604
|
||||
#define init_proc_PPC32 init_proc_604
|
||||
#define POWERPC_BFDM_PPC32 POWERPC_BFDM_604
|
||||
#define POWERPC_FLAG_PPC32 POWERPC_FLAG_604
|
||||
|
||||
/* Default 64 bits PowerPC target will be 970 FX */
|
||||
#define CPU_POWERPC_PPC64 CPU_POWERPC_970FX
|
||||
|
|
@ -4207,6 +4244,7 @@ static void init_proc_620 (CPUPPCState *env)
|
|||
#define POWERPC_INPUT_PPC64 POWERPC_INPUT_970FX
|
||||
#define init_proc_PPC64 init_proc_970FX
|
||||
#define POWERPC_BFDM_PPC64 POWERPC_BFDM_970FX
|
||||
#define POWERPC_FLAG_PPC64 POWERPC_FLAG_970FX
|
||||
|
||||
/* Default PowerPC target will be PowerPC 32 */
|
||||
#if defined (TARGET_PPC64) && 0 // XXX: TODO
|
||||
|
|
@ -4218,6 +4256,7 @@ static void init_proc_620 (CPUPPCState *env)
|
|||
#define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC64
|
||||
#define init_proc_DEFAULT init_proc_PPC64
|
||||
#define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC64
|
||||
#define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC64
|
||||
#else
|
||||
#define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC32
|
||||
#define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32
|
||||
|
|
@ -4227,6 +4266,7 @@ static void init_proc_620 (CPUPPCState *env)
|
|||
#define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC32
|
||||
#define init_proc_DEFAULT init_proc_PPC32
|
||||
#define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC32
|
||||
#define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC32
|
||||
#endif
|
||||
|
||||
/*****************************************************************************/
|
||||
|
|
@ -4724,6 +4764,7 @@ enum {
|
|||
.excp_model = glue(POWERPC_EXCP_,_type), \
|
||||
.bus_model = glue(POWERPC_INPUT_,_type), \
|
||||
.bfd_mach = glue(POWERPC_BFDM_,_type), \
|
||||
.flags = glue(POWERPC_FLAG_,_type), \
|
||||
.init_proc = &glue(init_proc_,_type), \
|
||||
}
|
||||
|
||||
|
|
@ -6016,6 +6057,7 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
|
|||
env->mmu_model = def->mmu_model;
|
||||
env->excp_model = def->excp_model;
|
||||
env->bus_model = def->bus_model;
|
||||
env->flags = def->flags;
|
||||
env->bfd_mach = def->bfd_mach;
|
||||
if (create_ppc_opcodes(env, def) < 0)
|
||||
return -1;
|
||||
|
|
|
|||
Loading…
Reference in New Issue