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target/mips: hold BQL for timer interrupts 

Hold BQL when accessing timer which can cause interrupts

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
master
Yongbok Kim 2017-03-03 11:20:21 +00:00 committed by Alex Bennée
parent d8b2239bcd
commit d394698d73
1 changed files with 18 additions and 3 deletions
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21
target/mips/op_helper.c
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@ -17,6 +17,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
#include "cpu.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
@ -827,7 +828,11 @@ target_ulong helper_mftc0_tcschefback(CPUMIPSState *env)
target_ulong helper_mfc0_count(CPUMIPSState *env)
{
return (int32_t)cpu_mips_get_count(env);
int32_t count;
qemu_mutex_lock_iothread();
count = (int32_t) cpu_mips_get_count(env);
qemu_mutex_unlock_iothread();
return count;
}
target_ulong helper_mftc0_entryhi(CPUMIPSState *env)
@ -1375,7 +1380,9 @@ void helper_mtc0_hwrena(CPUMIPSState *env, target_ulong arg1)
void helper_mtc0_count(CPUMIPSState *env, target_ulong arg1)
{
qemu_mutex_lock_iothread();
cpu_mips_store_count(env, arg1);
qemu_mutex_unlock_iothread();
}
void helper_mtc0_entryhi(CPUMIPSState *env, target_ulong arg1)
@ -1424,7 +1431,9 @@ void helper_mttc0_entryhi(CPUMIPSState *env, target_ulong arg1)
void helper_mtc0_compare(CPUMIPSState *env, target_ulong arg1)
{
qemu_mutex_lock_iothread();
cpu_mips_store_compare(env, arg1);
qemu_mutex_unlock_iothread();
}
void helper_mtc0_status(CPUMIPSState *env, target_ulong arg1)
@ -1475,7 +1484,9 @@ void helper_mtc0_srsctl(CPUMIPSState *env, target_ulong arg1)
void helper_mtc0_cause(CPUMIPSState *env, target_ulong arg1)
{
qemu_mutex_lock_iothread();
cpu_mips_store_cause(env, arg1);
qemu_mutex_unlock_iothread();
}
void helper_mttc0_cause(CPUMIPSState *env, target_ulong arg1)
@ -2296,12 +2307,16 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env)
target_ulong helper_rdhwr_cc(CPUMIPSState *env)
{
int32_t count;
check_hwrena(env, 2, GETPC());
#ifdef CONFIG_USER_ONLY
return env->CP0_Count;
count = env->CP0_Count;
#else
return (int32_t)cpu_mips_get_count(env);
qemu_mutex_lock_iothread();
count = (int32_t)cpu_mips_get_count(env);
qemu_mutex_unlock_iothread();
#endif
return count;
}
target_ulong helper_rdhwr_ccres(CPUMIPSState *env)