mirror of https://github.com/proxmox/mirror_qemu
x86 cleanup
Remove some unnecessary includes, add needed includes, move prototypes to cpu.h to suppress missing prototype warnings. Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock, cpu_unlock, restore_native_fp_state, save_native_fp_state). Make some functions and data static (f15rk, parity_table, rclw_table, rclb_table, raise_interrupt, fpu_raise_exception), they are not used outside op_helper.c anymore. Make some x86_64 and user only code conditional to avoid warnings. Document where each function is implemented in cpu.h and exec.h. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6005 c046a42c-6fe2-441c-8c8c-71466251a162master
blueswir1
parent
cf1cf21eac
commit
d9957a8b0f
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@ -720,10 +720,12 @@ static inline void cpu_x86_set_cpl(CPUX86State *s, int cpl)
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#endif
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}
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/* op_helper.c */
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/* used for debug or cpu save/restore */
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void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, CPU86_LDouble f);
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CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper);
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/* cpu-exec.c */
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/* the following helpers are only usable in user mode simulation as
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they can trigger unexpected exceptions */
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void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector);
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@ -735,24 +737,51 @@ void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32);
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is returned if the signal was handled by the virtual CPU. */
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int cpu_x86_signal_handler(int host_signum, void *pinfo,
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void *puc);
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/* helper.c */
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int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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int is_write, int mmu_idx, int is_softmmu);
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void cpu_x86_set_a20(CPUX86State *env, int a20_state);
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void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx);
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uint64_t cpu_get_tsc(CPUX86State *env);
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static inline int hw_breakpoint_enabled(unsigned long dr7, int index)
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{
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return (dr7 >> (index * 2)) & 3;
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}
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static inline int hw_breakpoint_type(unsigned long dr7, int index)
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{
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return (dr7 >> (DR7_TYPE_SHIFT + (index * 2))) & 3;
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}
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static inline int hw_breakpoint_len(unsigned long dr7, int index)
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{
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int len = ((dr7 >> (DR7_LEN_SHIFT + (index * 2))) & 3);
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return (len == 2) ? 8 : len + 1;
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}
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void hw_breakpoint_insert(CPUX86State *env, int index);
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void hw_breakpoint_remove(CPUX86State *env, int index);
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int check_hw_breakpoints(CPUX86State *env, int force_dr6_update);
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/* will be suppressed */
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void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
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void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
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/* hw/apic.c */
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void cpu_set_apic_base(CPUX86State *env, uint64_t val);
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uint64_t cpu_get_apic_base(CPUX86State *env);
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void cpu_set_apic_tpr(CPUX86State *env, uint8_t val);
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#ifndef NO_CPU_IO_DEFS
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uint8_t cpu_get_apic_tpr(CPUX86State *env);
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#endif
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/* hw/pc.c */
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void cpu_smm_update(CPUX86State *env);
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/* will be suppressed */
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void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx);
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uint64_t cpu_get_tsc(CPUX86State *env);
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/* used to debug */
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#define X86_DUMP_FPU 0x0001 /* dump FPU state too */
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@ -787,6 +816,7 @@ static inline int cpu_mmu_index (CPUState *env)
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return (env->hflags & HF_CPL_MASK) == 3 ? 1 : 0;
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}
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/* translate.c */
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void optimize_flags_init(void);
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typedef struct CCTable {
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@ -803,26 +833,6 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
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}
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#endif
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static inline int hw_breakpoint_enabled(unsigned long dr7, int index)
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{
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return (dr7 >> (index * 2)) & 3;
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}
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static inline int hw_breakpoint_type(unsigned long dr7, int index)
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{
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return (dr7 >> (DR7_TYPE_SHIFT + (index * 2))) & 3;
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}
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static inline int hw_breakpoint_len(unsigned long dr7, int index)
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{
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int len = ((dr7 >> (DR7_LEN_SHIFT + (index * 2))) & 3);
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return (len == 2) ? 8 : len + 1;
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}
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void hw_breakpoint_insert(CPUState *env, int index);
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void hw_breakpoint_remove(CPUState *env, int index);
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int check_hw_breakpoints(CPUState *env, int force_dr6_update);
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#include "cpu-all.h"
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#include "exec-all.h"
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@ -57,18 +57,11 @@ register struct CPUX86State *env asm(AREG0);
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#include "cpu.h"
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#include "exec-all.h"
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void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
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void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
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int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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int is_write, int mmu_idx, int is_softmmu);
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void __hidden cpu_lock(void);
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void __hidden cpu_unlock(void);
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/* op_helper.c */
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void do_interrupt(int intno, int is_int, int error_code,
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target_ulong next_eip, int is_hw);
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void do_interrupt_user(int intno, int is_int, int error_code,
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target_ulong next_eip);
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void raise_interrupt(int intno, int is_int, int error_code,
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int next_eip_addend);
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void raise_exception_err(int exception_index, int error_code);
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void raise_exception(int exception_index);
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void do_smm_enter(void);
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@ -274,16 +267,6 @@ static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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#define FPUC_EM 0x3f
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extern const CPU86_LDouble f15rk[7];
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void fpu_raise_exception(void);
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void restore_native_fp_state(CPUState *env);
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void save_native_fp_state(CPUState *env);
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extern const uint8_t parity_table[256];
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extern const uint8_t rclw_table[32];
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extern const uint8_t rclb_table[32];
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static inline uint32_t compute_eflags(void)
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{
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return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
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@ -27,10 +27,8 @@
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#include "cpu.h"
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#include "exec-all.h"
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#include "svm.h"
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#include "qemu-common.h"
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#include "kvm.h"
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#include "helper.h"
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//#define DEBUG_MMU
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@ -849,12 +847,6 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4)
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env->cr[4] = new_cr4;
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}
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/* XXX: also flush 4MB pages */
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void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr)
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{
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tlb_flush_page(env, addr);
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}
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#if defined(CONFIG_USER_ONLY)
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int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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@ -19,6 +19,7 @@
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*/
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#define CPU_NO_GLOBAL_REGS
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#include "exec.h"
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#include "exec-all.h"
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#include "host-utils.h"
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//#define DEBUG_PCALL
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@ -32,7 +33,7 @@ do {\
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} while (0)
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#endif
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const uint8_t parity_table[256] = {
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static const uint8_t parity_table[256] = {
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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@ -68,7 +69,7 @@ const uint8_t parity_table[256] = {
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};
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/* modulo 17 table */
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const uint8_t rclw_table[32] = {
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static const uint8_t rclw_table[32] = {
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0, 1, 2, 3, 4, 5, 6, 7,
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8, 9,10,11,12,13,14,15,
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16, 0, 1, 2, 3, 4, 5, 6,
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@ -76,14 +77,14 @@ const uint8_t rclw_table[32] = {
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};
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/* modulo 9 table */
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const uint8_t rclb_table[32] = {
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static const uint8_t rclb_table[32] = {
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0, 1, 2, 3, 4, 5, 6, 7,
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8, 0, 1, 2, 3, 4, 5, 6,
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7, 8, 0, 1, 2, 3, 4, 5,
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6, 7, 8, 0, 1, 2, 3, 4,
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};
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const CPU86_LDouble f15rk[7] =
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static const CPU86_LDouble f15rk[7] =
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{
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0.00000000000000000000L,
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1.00000000000000000000L,
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@ -995,6 +996,7 @@ static void do_interrupt64(int intno, int is_int, int error_code,
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}
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#endif
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#ifdef TARGET_X86_64
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#if defined(CONFIG_USER_ONLY)
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void helper_syscall(int next_eip_addend)
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{
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@ -1011,7 +1013,6 @@ void helper_syscall(int next_eip_addend)
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raise_exception_err(EXCP06_ILLOP, 0);
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}
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selector = (env->star >> 32) & 0xffff;
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#ifdef TARGET_X86_64
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if (env->hflags & HF_LMA_MASK) {
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int code64;
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@ -1037,9 +1038,7 @@ void helper_syscall(int next_eip_addend)
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env->eip = env->lstar;
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else
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env->eip = env->cstar;
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} else
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#endif
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{
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} else {
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ECX = (uint32_t)(env->eip + next_eip_addend);
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cpu_x86_set_cpl(env, 0);
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@ -1058,7 +1057,9 @@ void helper_syscall(int next_eip_addend)
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}
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}
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#endif
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#endif
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#ifdef TARGET_X86_64
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void helper_sysret(int dflag)
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{
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int cpl, selector;
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@ -1071,7 +1072,6 @@ void helper_sysret(int dflag)
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raise_exception_err(EXCP0D_GPF, 0);
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}
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selector = (env->star >> 48) & 0xffff;
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#ifdef TARGET_X86_64
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if (env->hflags & HF_LMA_MASK) {
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if (dflag == 2) {
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cpu_x86_load_seg_cache(env, R_CS, (selector + 16) | 3,
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@ -1097,9 +1097,7 @@ void helper_sysret(int dflag)
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load_eflags((uint32_t)(env->regs[11]), TF_MASK | AC_MASK | ID_MASK |
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IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK);
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cpu_x86_set_cpl(env, 3);
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} else
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#endif
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{
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} else {
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cpu_x86_load_seg_cache(env, R_CS, selector | 3,
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0, 0xffffffff,
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DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
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@ -1123,6 +1121,7 @@ void helper_sysret(int dflag)
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}
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#endif
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}
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#endif
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/* real mode interrupt */
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static void do_interrupt_real(int intno, int is_int, int error_code,
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@ -1285,8 +1284,8 @@ static int check_exception(int intno, int *error_code)
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* EIP value AFTER the interrupt instruction. It is only relevant if
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* is_int is TRUE.
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*/
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void raise_interrupt(int intno, int is_int, int error_code,
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int next_eip_addend)
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static void raise_interrupt(int intno, int is_int, int error_code,
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int next_eip_addend)
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{
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if (!is_int) {
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helper_svm_check_intercept_param(SVM_EXIT_EXCP_BASE + intno, error_code);
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@ -1304,7 +1303,7 @@ void raise_interrupt(int intno, int is_int, int error_code,
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/* shortcuts to generate exceptions */
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void (raise_exception_err)(int exception_index, int error_code)
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void raise_exception_err(int exception_index, int error_code)
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{
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raise_interrupt(exception_index, 0, error_code, 0);
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}
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@ -3319,7 +3318,7 @@ static inline CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b)
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return a / b;
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}
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void fpu_raise_exception(void)
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static void fpu_raise_exception(void)
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{
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if (env->cr[0] & CR0_NE_MASK) {
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raise_exception(EXCP10_COPR);
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@ -4660,6 +4659,7 @@ static float approx_rcp(float a)
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#endif
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#if !defined(CONFIG_USER_ONLY)
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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@ -4692,7 +4692,7 @@ void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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}
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env = saved_env;
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}
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#endif
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/* Secure Virtual Machine helpers */
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