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hw/dma/omap_dma: Use qemu_log_mask(GUEST_ERROR) instead of fprintf 

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20180624040609.17572-5-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Philippe Mathieu-Daudé 2018-06-26 17:50:40 +01:00 committed by Peter Maydell
parent f3724bf5e6
commit e26745d557
1 changed files with 40 additions and 24 deletions
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64
hw/dma/omap_dma.c
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@ -879,15 +879,18 @@ static int omap_dma_ch_reg_write(struct omap_dma_s *s,
ch->burst[0] = (value & 0x0180) >> 7; ch->burst[0] = (value & 0x0180) >> 7;
ch->pack[0] = (value & 0x0040) >> 6; ch->pack[0] = (value & 0x0040) >> 6;
ch->port[0] = (enum omap_dma_port) ((value & 0x003c) >> 2); ch->port[0] = (enum omap_dma_port) ((value & 0x003c) >> 2);
if (ch->port[0] >= __omap_dma_port_last) if (ch->port[0] >= __omap_dma_port_last) {
printf("%s: invalid DMA port %i\n", __func__, qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid DMA port %i\n",
ch->port[0]); __func__, ch->port[0]);
if (ch->port[1] >= __omap_dma_port_last) }
printf("%s: invalid DMA port %i\n", __func__, if (ch->port[1] >= __omap_dma_port_last) {
ch->port[1]); qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid DMA port %i\n",
__func__, ch->port[1]);
}
ch->data_type = 1 << (value & 3); ch->data_type = 1 << (value & 3);
if ((value & 3) == 3) { if ((value & 3) == 3) {
printf("%s: bad data_type for DMA channel\n", __func__); qemu_log_mask(LOG_GUEST_ERROR,
"%s: bad data_type for DMA channel\n", __func__);
ch->data_type >>= 1; ch->data_type >>= 1;
} }
break; break;
@ -1899,14 +1902,18 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
if (value & 2) /* SOFTRESET */ if (value & 2) /* SOFTRESET */
omap_dma_reset(s->dma); omap_dma_reset(s->dma);
s->ocp = value & 0x3321; s->ocp = value & 0x3321;
if (((s->ocp >> 12) & 3) == 3) /* MIDLEMODE */ if (((s->ocp >> 12) & 3) == 3) { /* MIDLEMODE */
fprintf(stderr, "%s: invalid DMA power mode\n", __func__); qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid DMA power mode\n",
__func__);
}
return; return;
case 0x78: /* DMA4_GCR */ case 0x78: /* DMA4_GCR */
s->gcr = value & 0x00ff00ff; s->gcr = value & 0x00ff00ff;
if ((value & 0xff) == 0x00) /* MAX_CHANNEL_FIFO_DEPTH */ if ((value & 0xff) == 0x00) { /* MAX_CHANNEL_FIFO_DEPTH */
fprintf(stderr, "%s: wrong FIFO depth in GCR\n", __func__); qemu_log_mask(LOG_GUEST_ERROR, "%s: wrong FIFO depth in GCR\n",
__func__);
}
return; return;
case 0x80 ... 0xfff: case 0x80 ... 0xfff:
@ -1935,9 +1942,11 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
case 0x00: /* DMA4_CCR */ case 0x00: /* DMA4_CCR */
ch->buf_disable = (value >> 25) & 1; ch->buf_disable = (value >> 25) & 1;
ch->src_sync = (value >> 24) & 1; /* XXX For CamDMA must be 1 */ ch->src_sync = (value >> 24) & 1; /* XXX For CamDMA must be 1 */
if (ch->buf_disable && !ch->src_sync) if (ch->buf_disable && !ch->src_sync) {
fprintf(stderr, "%s: Buffering disable is not allowed in " qemu_log_mask(LOG_GUEST_ERROR,
"destination synchronised mode\n", __func__); "%s: Buffering disable is not allowed in "
"destination synchronised mode\n", __func__);
}
ch->prefetch = (value >> 23) & 1; ch->prefetch = (value >> 23) & 1;
ch->bs = (value >> 18) & 1; ch->bs = (value >> 18) & 1;
ch->transparent_copy = (value >> 17) & 1; ch->transparent_copy = (value >> 17) & 1;
@ -1947,9 +1956,11 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
ch->suspend = (value & 0x0100) >> 8; ch->suspend = (value & 0x0100) >> 8;
ch->priority = (value & 0x0040) >> 6; ch->priority = (value & 0x0040) >> 6;
ch->fs = (value & 0x0020) >> 5; ch->fs = (value & 0x0020) >> 5;
if (ch->fs && ch->bs && ch->mode[0] && ch->mode[1]) if (ch->fs && ch->bs && ch->mode[0] && ch->mode[1]) {
fprintf(stderr, "%s: For a packet transfer at least one port " qemu_log_mask(LOG_GUEST_ERROR,
"must be constant-addressed\n", __func__); "%s: For a packet transfer at least one port "
"must be constant-addressed\n", __func__);
}
ch->sync = (value & 0x001f) | ((value >> 14) & 0x0060); ch->sync = (value & 0x001f) | ((value >> 14) & 0x0060);
/* XXX must be 0x01 for CamDMA */ /* XXX must be 0x01 for CamDMA */
@ -1978,9 +1989,11 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
ch->endian_lock[0] =(value >> 20) & 1; ch->endian_lock[0] =(value >> 20) & 1;
ch->endian[1] =(value >> 19) & 1; ch->endian[1] =(value >> 19) & 1;
ch->endian_lock[1] =(value >> 18) & 1; ch->endian_lock[1] =(value >> 18) & 1;
if (ch->endian[0] != ch->endian[1]) if (ch->endian[0] != ch->endian[1]) {
fprintf(stderr, "%s: DMA endianness conversion enable attempt\n", qemu_log_mask(LOG_GUEST_ERROR,
__func__); "%s: DMA endianness conversion enable attempt\n",
__func__);
}
ch->write_mode = (value >> 16) & 3; ch->write_mode = (value >> 16) & 3;
ch->burst[1] = (value & 0xc000) >> 14; ch->burst[1] = (value & 0xc000) >> 14;
ch->pack[1] = (value & 0x2000) >> 13; ch->pack[1] = (value & 0x2000) >> 13;
@ -1988,12 +2001,15 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
ch->burst[0] = (value & 0x0180) >> 7; ch->burst[0] = (value & 0x0180) >> 7;
ch->pack[0] = (value & 0x0040) >> 6; ch->pack[0] = (value & 0x0040) >> 6;
ch->translate[0] = (value & 0x003c) >> 2; ch->translate[0] = (value & 0x003c) >> 2;
if (ch->translate[0] | ch->translate[1]) if (ch->translate[0] | ch->translate[1]) {
fprintf(stderr, "%s: bad MReqAddressTranslate sideband signal\n", qemu_log_mask(LOG_GUEST_ERROR,
__func__); "%s: bad MReqAddressTranslate sideband signal\n",
__func__);
}
ch->data_type = 1 << (value & 3); ch->data_type = 1 << (value & 3);
if ((value & 3) == 3) { if ((value & 3) == 3) {
printf("%s: bad data_type for DMA channel\n", __func__); qemu_log_mask(LOG_GUEST_ERROR,
"%s: bad data_type for DMA channel\n", __func__);
ch->data_type >>= 1; ch->data_type >>= 1;
} }
break; break;