mirror of https://github.com/proxmox/mirror_qemu
spapr: introduce a IRQ controller backend to the machine
This proposal moves all the related IRQ routines of the sPAPR machine behind a sPAPR IRQ backend interface 'spapr_irq' to prepare for future changes. First of which will be to increase the size of the IRQ number space, then, will follow a new backend for the POWER9 XIVE IRQ controller. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>master
Cédric Le Goater
David Gibson
parent
69bd18f843
commit
ef01ed9d19
180
hw/ppc/spapr.c
180
hw/ppc/spapr.c
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@ -54,7 +54,6 @@
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_vio.h"
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#include "hw/pci-host/spapr.h"
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#include "hw/ppc/xics.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/pci.h"
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@ -117,33 +116,6 @@ static bool spapr_is_thread0_in_vcore(sPAPRMachineState *spapr,
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return spapr_get_vcpu_id(cpu) % spapr->vsmt == 0;
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}
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static ICSState *spapr_ics_create(sPAPRMachineState *spapr,
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const char *type_ics,
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int nr_irqs, Error **errp)
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{
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Error *local_err = NULL;
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Object *obj;
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obj = object_new(type_ics);
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object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort);
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object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr),
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&error_abort);
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object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err);
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if (local_err) {
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goto error;
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}
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object_property_set_bool(obj, true, "realized", &local_err);
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if (local_err) {
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goto error;
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}
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return ICS_BASE(obj);
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error:
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error_propagate(errp, local_err);
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return NULL;
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}
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static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque)
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{
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/* Dummy entries correspond to unused ICPState objects in older QEMUs,
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@ -184,43 +156,6 @@ static int xics_max_server_number(sPAPRMachineState *spapr)
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return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
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}
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static void xics_system_init(MachineState *machine, int nr_irqs, Error **errp)
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{
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sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
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Error *local_err = NULL;
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/* Initialize the MSI IRQ allocator. */
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if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
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spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI);
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}
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if (kvm_enabled()) {
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if (machine_kernel_irqchip_allowed(machine) &&
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!xics_kvm_init(spapr, &local_err)) {
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spapr->icp_type = TYPE_KVM_ICP;
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spapr->ics = spapr_ics_create(spapr, TYPE_ICS_KVM, nr_irqs,
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&local_err);
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}
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if (machine_kernel_irqchip_required(machine) && !spapr->ics) {
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error_prepend(&local_err,
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"kernel_irqchip requested but unavailable: ");
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goto error;
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}
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error_free(local_err);
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local_err = NULL;
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}
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if (!spapr->ics) {
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xics_spapr_init(spapr);
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spapr->icp_type = TYPE_ICP;
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spapr->ics = spapr_ics_create(spapr, TYPE_ICS_SIMPLE, nr_irqs,
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&local_err);
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}
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error:
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error_propagate(errp, local_err);
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}
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static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
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int smt_threads)
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{
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@ -2618,7 +2553,7 @@ static void spapr_machine_init(MachineState *machine)
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load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
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/* Set up Interrupt Controller before we create the VCPUs */
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xics_system_init(machine, XICS_IRQS_SPAPR, &error_fatal);
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smc->irq->init(spapr, &error_fatal);
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/* Set up containers for ibm,client-architecture-support negotiated options
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*/
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@ -3810,121 +3745,13 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int vcpu_id)
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return cpu ? ICP(cpu->intc) : NULL;
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}
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#define ICS_IRQ_FREE(ics, srcno) \
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(!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK)))
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static int ics_find_free_block(ICSState *ics, int num, int alignnum)
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{
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int first, i;
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for (first = 0; first < ics->nr_irqs; first += alignnum) {
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if (num > (ics->nr_irqs - first)) {
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return -1;
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}
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for (i = first; i < first + num; ++i) {
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if (!ICS_IRQ_FREE(ics, i)) {
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break;
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}
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}
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if (i == (first + num)) {
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return first;
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}
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}
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return -1;
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}
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int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **errp)
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{
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ICSState *ics = spapr->ics;
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int first = -1;
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assert(ics);
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/*
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* MSIMesage::data is used for storing VIRQ so
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* it has to be aligned to num to support multiple
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* MSI vectors. MSI-X is not affected by this.
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* The hint is used for the first IRQ, the rest should
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* be allocated continuously.
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*/
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if (align) {
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assert((num == 1) || (num == 2) || (num == 4) ||
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(num == 8) || (num == 16) || (num == 32));
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first = ics_find_free_block(ics, num, num);
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} else {
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first = ics_find_free_block(ics, num, 1);
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}
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if (first < 0) {
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error_setg(errp, "can't find a free %d-IRQ block", num);
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return -1;
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}
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return first + ics->offset;
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}
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int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp)
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{
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ICSState *ics = spapr->ics;
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assert(ics);
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if (!ics_valid_irq(ics, irq)) {
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error_setg(errp, "IRQ %d is invalid", irq);
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return -1;
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}
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if (!ICS_IRQ_FREE(ics, irq - ics->offset)) {
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error_setg(errp, "IRQ %d is not free", irq);
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return -1;
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}
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ics_set_irq_type(ics, irq - ics->offset, lsi);
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return 0;
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}
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void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num)
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{
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ICSState *ics = spapr->ics;
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int srcno = irq - ics->offset;
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int i;
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if (ics_valid_irq(ics, irq)) {
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trace_spapr_irq_free(0, irq, num);
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for (i = srcno; i < srcno + num; ++i) {
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if (ICS_IRQ_FREE(ics, i)) {
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trace_spapr_irq_free_warn(0, i + ics->offset);
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}
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memset(&ics->irqs[i], 0, sizeof(ICSIRQState));
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}
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}
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}
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qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq)
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{
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ICSState *ics = spapr->ics;
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if (ics_valid_irq(ics, irq)) {
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return ics->qirqs[irq - ics->offset];
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}
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return NULL;
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}
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static void spapr_pic_print_info(InterruptStatsProvider *obj,
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Monitor *mon)
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{
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sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
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CPUState *cs;
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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CPU_FOREACH(cs) {
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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icp_pic_print_info(ICP(cpu->intc), mon);
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}
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ics_pic_print_info(spapr->ics, mon);
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smc->irq->print_info(spapr, mon);
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}
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int spapr_get_vcpu_id(PowerPCCPU *cpu)
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@ -4037,6 +3864,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
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smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
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smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = 16; /* 64kiB */
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spapr_caps_add_properties(smc, &error_abort);
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smc->irq = &spapr_irq_xics;
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}
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static const TypeInfo spapr_machine_info = {
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@ -11,6 +11,7 @@
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#include "hw/ppc/spapr_cpu_core.h"
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#include "target/ppc/cpu.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/xics.h" /* for icp_create() - to be removed */
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#include "hw/boards.h"
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#include "qapi/error.h"
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#include "sysemu/cpus.h"
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@ -13,6 +13,9 @@
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#include "qapi/error.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/xics.h"
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#include "sysemu/kvm.h"
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#include "trace.h"
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void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis)
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{
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@ -54,3 +57,230 @@ void spapr_irq_msi_reset(sPAPRMachineState *spapr)
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{
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bitmap_clear(spapr->irq_map, 0, spapr->irq_map_nr);
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}
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/*
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* XICS IRQ backend.
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*/
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static ICSState *spapr_ics_create(sPAPRMachineState *spapr,
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const char *type_ics,
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int nr_irqs, Error **errp)
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{
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Error *local_err = NULL;
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Object *obj;
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obj = object_new(type_ics);
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object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort);
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object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr),
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&error_abort);
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object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err);
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if (local_err) {
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goto error;
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}
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object_property_set_bool(obj, true, "realized", &local_err);
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if (local_err) {
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goto error;
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}
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return ICS_BASE(obj);
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error:
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error_propagate(errp, local_err);
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return NULL;
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}
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static void spapr_irq_init_xics(sPAPRMachineState *spapr, Error **errp)
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{
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MachineState *machine = MACHINE(spapr);
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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int nr_irqs = smc->irq->nr_irqs;
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Error *local_err = NULL;
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/* Initialize the MSI IRQ allocator. */
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if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
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spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI);
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}
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if (kvm_enabled()) {
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if (machine_kernel_irqchip_allowed(machine) &&
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!xics_kvm_init(spapr, &local_err)) {
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spapr->icp_type = TYPE_KVM_ICP;
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spapr->ics = spapr_ics_create(spapr, TYPE_ICS_KVM, nr_irqs,
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&local_err);
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}
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if (machine_kernel_irqchip_required(machine) && !spapr->ics) {
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error_prepend(&local_err,
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"kernel_irqchip requested but unavailable: ");
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goto error;
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}
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error_free(local_err);
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local_err = NULL;
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}
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if (!spapr->ics) {
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xics_spapr_init(spapr);
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spapr->icp_type = TYPE_ICP;
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spapr->ics = spapr_ics_create(spapr, TYPE_ICS_SIMPLE, nr_irqs,
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&local_err);
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}
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error:
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error_propagate(errp, local_err);
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}
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#define ICS_IRQ_FREE(ics, srcno) \
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(!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK)))
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static int spapr_irq_claim_xics(sPAPRMachineState *spapr, int irq, bool lsi,
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Error **errp)
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{
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ICSState *ics = spapr->ics;
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assert(ics);
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if (!ics_valid_irq(ics, irq)) {
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error_setg(errp, "IRQ %d is invalid", irq);
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return -1;
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}
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if (!ICS_IRQ_FREE(ics, irq - ics->offset)) {
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error_setg(errp, "IRQ %d is not free", irq);
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return -1;
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}
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ics_set_irq_type(ics, irq - ics->offset, lsi);
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return 0;
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}
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static void spapr_irq_free_xics(sPAPRMachineState *spapr, int irq, int num)
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{
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ICSState *ics = spapr->ics;
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uint32_t srcno = irq - ics->offset;
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int i;
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if (ics_valid_irq(ics, irq)) {
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trace_spapr_irq_free(0, irq, num);
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for (i = srcno; i < srcno + num; ++i) {
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if (ICS_IRQ_FREE(ics, i)) {
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trace_spapr_irq_free_warn(0, i);
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}
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memset(&ics->irqs[i], 0, sizeof(ICSIRQState));
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}
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}
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}
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static qemu_irq spapr_qirq_xics(sPAPRMachineState *spapr, int irq)
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{
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ICSState *ics = spapr->ics;
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uint32_t srcno = irq - ics->offset;
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if (ics_valid_irq(ics, irq)) {
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return ics->qirqs[srcno];
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}
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return NULL;
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}
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static void spapr_irq_print_info_xics(sPAPRMachineState *spapr, Monitor *mon)
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{
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CPUState *cs;
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CPU_FOREACH(cs) {
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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icp_pic_print_info(ICP(cpu->intc), mon);
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}
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ics_pic_print_info(spapr->ics, mon);
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}
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sPAPRIrq spapr_irq_xics = {
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.nr_irqs = XICS_IRQS_SPAPR,
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.init = spapr_irq_init_xics,
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.claim = spapr_irq_claim_xics,
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.free = spapr_irq_free_xics,
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.qirq = spapr_qirq_xics,
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.print_info = spapr_irq_print_info_xics,
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};
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/*
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* sPAPR IRQ frontend routines for devices
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*/
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int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp)
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{
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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return smc->irq->claim(spapr, irq, lsi, errp);
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}
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void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num)
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{
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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smc->irq->free(spapr, irq, num);
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}
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qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq)
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{
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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return smc->irq->qirq(spapr, irq);
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}
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/*
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* XICS legacy routines - to deprecate one day
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*/
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static int ics_find_free_block(ICSState *ics, int num, int alignnum)
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{
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int first, i;
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for (first = 0; first < ics->nr_irqs; first += alignnum) {
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if (num > (ics->nr_irqs - first)) {
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return -1;
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}
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for (i = first; i < first + num; ++i) {
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if (!ICS_IRQ_FREE(ics, i)) {
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break;
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}
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}
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if (i == (first + num)) {
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return first;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **errp)
|
||||
{
|
||||
ICSState *ics = spapr->ics;
|
||||
int first = -1;
|
||||
|
||||
assert(ics);
|
||||
|
||||
/*
|
||||
* MSIMesage::data is used for storing VIRQ so
|
||||
* it has to be aligned to num to support multiple
|
||||
* MSI vectors. MSI-X is not affected by this.
|
||||
* The hint is used for the first IRQ, the rest should
|
||||
* be allocated continuously.
|
||||
*/
|
||||
if (align) {
|
||||
assert((num == 1) || (num == 2) || (num == 4) ||
|
||||
(num == 8) || (num == 16) || (num == 32));
|
||||
first = ics_find_free_block(ics, num, num);
|
||||
} else {
|
||||
first = ics_find_free_block(ics, num, 1);
|
||||
}
|
||||
|
||||
if (first < 0) {
|
||||
error_setg(errp, "can't find a free %d-IRQ block", num);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return first + ics->offset;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,7 +4,6 @@
|
|||
#include "qemu/units.h"
|
||||
#include "sysemu/dma.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/ppc/xics.h"
|
||||
#include "hw/ppc/spapr_drc.h"
|
||||
#include "hw/mem/pc-dimm.h"
|
||||
#include "hw/ppc/spapr_ovec.h"
|
||||
|
|
@ -16,6 +15,7 @@ struct sPAPRNVRAM;
|
|||
typedef struct sPAPREventLogEntry sPAPREventLogEntry;
|
||||
typedef struct sPAPREventSource sPAPREventSource;
|
||||
typedef struct sPAPRPendingHPT sPAPRPendingHPT;
|
||||
typedef struct ICSState ICSState;
|
||||
|
||||
#define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL
|
||||
#define SPAPR_ENTRY_POINT 0x100
|
||||
|
|
@ -110,6 +110,7 @@ struct sPAPRMachineClass {
|
|||
unsigned n_dma, uint32_t *liobns, Error **errp);
|
||||
sPAPRResizeHPT resize_hpt_default;
|
||||
sPAPRCapabilities default_caps;
|
||||
sPAPRIrq *irq;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -780,14 +781,6 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu);
|
|||
void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp);
|
||||
PowerPCCPU *spapr_find_cpu(int vcpu_id);
|
||||
|
||||
int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align,
|
||||
Error **errp);
|
||||
#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
|
||||
int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
|
||||
void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);
|
||||
qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq);
|
||||
|
||||
|
||||
int spapr_caps_pre_load(void *opaque);
|
||||
int spapr_caps_pre_save(void *opaque);
|
||||
|
||||
|
|
|
|||
|
|
@ -29,4 +29,26 @@ int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align,
|
|||
void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num);
|
||||
void spapr_irq_msi_reset(sPAPRMachineState *spapr);
|
||||
|
||||
typedef struct sPAPRIrq {
|
||||
uint32_t nr_irqs;
|
||||
|
||||
void (*init)(sPAPRMachineState *spapr, Error **errp);
|
||||
int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
|
||||
void (*free)(sPAPRMachineState *spapr, int irq, int num);
|
||||
qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq);
|
||||
void (*print_info)(sPAPRMachineState *spapr, Monitor *mon);
|
||||
} sPAPRIrq;
|
||||
|
||||
extern sPAPRIrq spapr_irq_xics;
|
||||
|
||||
int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
|
||||
void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);
|
||||
qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq);
|
||||
|
||||
/*
|
||||
* XICS legacy routines
|
||||
*/
|
||||
int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **errp);
|
||||
#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue