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ppc/xics: move the cpu_setup() handler under the ICPState class 

The cpu_setup() handler is currently under the XICSState class but it
really belongs under ICPState as it is setting up an individual vCPU.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
master
Cédric Le Goater 2017-02-27 15:29:24 +01:00 committed by David Gibson
parent bf50860d1b
commit f023243432
3 changed files with 34 additions and 35 deletions
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8
hw/intc/xics.c
View File

@ -66,15 +66,15 @@ void xics_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
ICPState *ss = &xics->ss[cs->cpu_index];
XICSStateClass *info;
ICPStateClass *icpc;
assert(cs->cpu_index < xics->nr_servers);
ss->cs = cs;
info = XICS_COMMON_GET_CLASS(xics);
if (info->cpu_setup) {
info->cpu_setup(ss, cpu);
icpc = ICP_GET_CLASS(ss);
if (icpc->cpu_setup) {
icpc->cpu_setup(ss, cpu);
}
switch (PPC_INPUT(env)) {

58
hw/intc/xics_kvm.c
View File

@ -124,6 +124,34 @@ static void icp_kvm_reset(DeviceState *dev)
icp_set_kvm_state(icp, 1);
}
static void icp_kvm_cpu_setup(ICPState *ss, PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
int ret;
if (kernel_xics_fd == -1) {
abort();
}
/*
* If we are reusing a parked vCPU fd corresponding to the CPU
* which was hot-removed earlier we don't have to renable
* KVM_CAP_IRQ_XICS capability again.
*/
if (ss->cap_irq_xics_enabled) {
return;
}
ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
kvm_arch_vcpu_id(cs));
if (ret < 0) {
error_report("Unable to connect CPU%ld to kernel XICS: %s",
kvm_arch_vcpu_id(cs), strerror(errno));
exit(1);
}
ss->cap_irq_xics_enabled = true;
}
static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -132,6 +160,7 @@ static void icp_kvm_class_init(ObjectClass *klass, void *data)
dc->reset = icp_kvm_reset;
icpc->pre_save = icp_get_kvm_state;
icpc->post_load = icp_set_kvm_state;
icpc->cpu_setup = icp_kvm_cpu_setup;
}
static const TypeInfo icp_kvm_info = {
@ -324,33 +353,6 @@ static const TypeInfo ics_kvm_info = {
/*
* XICS-KVM
*/
static void xics_kvm_cpu_setup(ICPState *ss, PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
int ret;
if (kernel_xics_fd == -1) {
abort();
}
/*
* If we are reusing a parked vCPU fd corresponding to the CPU
* which was hot-removed earlier we don't have to renable
* KVM_CAP_IRQ_XICS capability again.
*/
if (ss->cap_irq_xics_enabled) {
return;
}
ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
kvm_arch_vcpu_id(cs));
if (ret < 0) {
error_report("Unable to connect CPU%ld to kernel XICS: %s",
kvm_arch_vcpu_id(cs), strerror(errno));
exit(1);
}
ss->cap_irq_xics_enabled = true;
}
static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t token,
@ -429,10 +431,8 @@ fail:
static void xics_kvm_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
dc->realize = xics_kvm_realize;
xsc->cpu_setup = xics_kvm_cpu_setup;
}
static const TypeInfo xics_spapr_kvm_info = {

3
include/hw/ppc/xics.h
View File

@ -73,8 +73,6 @@ typedef struct XICSFabric XICSFabric;
struct XICSStateClass {
DeviceClass parent_class;
void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
};
struct XICSState {
@ -101,6 +99,7 @@ struct ICPStateClass {
void (*pre_save)(ICPState *s);
int (*post_load)(ICPState *s, int version_id);
void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
};
struct ICPState {