mirror of https://github.com/proxmox/mirror_qemu
hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities
Absence of any Extended Capabilities is required to be indicated by an Extended Capability header with a Capability ID of 0000h, a Capability Version of 0h, and a Next Capability Offset of 000h. Instead of inserting a 'NULL' capability is simpler to mark the start of the Extended Configuration Space as read-only to achieve the same behaviour. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>master
parent
1883ff34b5
commit
f03d8ea330
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@ -64,6 +64,8 @@ static Property pci_props[] = {
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QEMU_PCI_CAP_SERR_BITNR, true),
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QEMU_PCI_CAP_SERR_BITNR, true),
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DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present,
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DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present,
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QEMU_PCIE_LNKSTA_DLLLA_BITNR, true),
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QEMU_PCIE_LNKSTA_DLLLA_BITNR, true),
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DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present,
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QEMU_PCIE_EXTCAP_INIT_BITNR, true),
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DEFINE_PROP_END_OF_LIST()
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DEFINE_PROP_END_OF_LIST()
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};
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};
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@ -109,6 +109,12 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
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PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
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PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
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pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
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pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
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if (dev->cap_present & QEMU_PCIE_EXTCAP_INIT) {
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/* read-only to behave like a 'NULL' Extended Capability Header */
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pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0);
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}
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return pos;
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return pos;
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}
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}
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@ -18,6 +18,10 @@
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.driver = "pci-bridge",\
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.driver = "pci-bridge",\
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.property = "shpc",\
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.property = "shpc",\
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.value = "on",\
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.value = "on",\
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},{\
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.driver = TYPE_PCI_DEVICE,\
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.property = "x-pcie-extcap-init",\
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.value = "off",\
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},
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},
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#define HW_COMPAT_2_7 \
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#define HW_COMPAT_2_7 \
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@ -183,6 +183,8 @@ enum {
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/* Link active status in endpoint capability is always set */
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/* Link active status in endpoint capability is always set */
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#define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8
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#define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8
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QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR),
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QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR),
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#define QEMU_PCIE_EXTCAP_INIT_BITNR 9
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QEMU_PCIE_EXTCAP_INIT = (1 << QEMU_PCIE_EXTCAP_INIT_BITNR),
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};
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};
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#define TYPE_PCI_DEVICE "pci-device"
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#define TYPE_PCI_DEVICE "pci-device"
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