mirror of https://github.com/proxmox/mirror_qemu
etrax-ser: Support the uart rx fifo.
Add support for the rx fifo to speed up bulk transfers. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@axis.com>master
parent
f471a17e9d
commit
f2fcffbbe8
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@ -49,20 +49,27 @@ struct etrax_serial
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CharDriverState *chr;
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CharDriverState *chr;
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qemu_irq irq;
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qemu_irq irq;
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/* This pending thing is a hack. */
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int pending_tx;
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int pending_tx;
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uint8_t rx_fifo[16];
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unsigned int rx_fifo_pos;
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unsigned int rx_fifo_len;
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/* Control registers. */
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/* Control registers. */
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uint32_t regs[R_MAX];
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uint32_t regs[R_MAX];
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};
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};
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static void ser_update_irq(struct etrax_serial *s)
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static void ser_update_irq(struct etrax_serial *s)
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{
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{
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s->regs[R_INTR] &= ~(s->regs[RW_ACK_INTR]);
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s->regs[R_MASKED_INTR] = s->regs[R_INTR] & s->regs[RW_INTR_MASK];
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if (s->rx_fifo_len) {
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s->regs[R_INTR] |= 8;
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} else {
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s->regs[R_INTR] &= ~8;
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}
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s->regs[R_MASKED_INTR] = s->regs[R_INTR] & s->regs[RW_INTR_MASK];
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qemu_set_irq(s->irq, !!s->regs[R_MASKED_INTR]);
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qemu_set_irq(s->irq, !!s->regs[R_MASKED_INTR]);
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s->regs[RW_ACK_INTR] = 0;
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}
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}
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static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
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static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
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@ -75,16 +82,25 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
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switch (addr)
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switch (addr)
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{
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{
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case R_STAT_DIN:
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case R_STAT_DIN:
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r = s->regs[RS_STAT_DIN];
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r = s->rx_fifo[(s->rx_fifo_pos - s->rx_fifo_len) & 15];
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if (s->rx_fifo_len) {
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r |= 1 << STAT_DAV;
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}
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r |= 1 << STAT_TR_RDY;
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r |= 1 << STAT_TR_IDLE;
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break;
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break;
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case RS_STAT_DIN:
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case RS_STAT_DIN:
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r = s->regs[addr];
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r = s->rx_fifo[(s->rx_fifo_pos - s->rx_fifo_len) & 15];
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/* Read side-effect: clear dav. */
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if (s->rx_fifo_len) {
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s->regs[addr] &= ~(1 << STAT_DAV);
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r |= 1 << STAT_DAV;
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s->rx_fifo_len--;
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}
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r |= 1 << STAT_TR_RDY;
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r |= 1 << STAT_TR_IDLE;
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break;
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break;
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default:
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default:
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r = s->regs[addr];
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r = s->regs[addr];
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D(printf ("%s %x=%x\n", __func__, addr, r));
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D(printf ("%s " TARGET_FMT_plx "=%x\n", __func__, addr, r));
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break;
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break;
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}
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}
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return r;
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return r;
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@ -97,23 +113,25 @@ ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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unsigned char ch = value;
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unsigned char ch = value;
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D(CPUState *env = s->env);
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D(CPUState *env = s->env);
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D(printf ("%s %x %x\n", __func__, addr, value));
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D(printf ("%s " TARGET_FMT_plx "=%x\n", __func__, addr, value));
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addr >>= 2;
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addr >>= 2;
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switch (addr)
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switch (addr)
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{
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{
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case RW_DOUT:
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case RW_DOUT:
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qemu_chr_write(s->chr, &ch, 1);
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qemu_chr_write(s->chr, &ch, 1);
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s->regs[R_INTR] |= 1;
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s->regs[R_INTR] |= 3;
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s->pending_tx = 1;
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s->pending_tx = 1;
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s->regs[addr] = value;
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s->regs[addr] = value;
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break;
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break;
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case RW_ACK_INTR:
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case RW_ACK_INTR:
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s->regs[addr] = value;
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if (s->pending_tx) {
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if (s->pending_tx && (s->regs[addr] & 1)) {
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value &= ~1;
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s->regs[R_INTR] |= 1;
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s->pending_tx = 0;
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s->pending_tx = 0;
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s->regs[addr] &= ~1;
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D(printf("fixedup value=%x r_intr=%x\n", value, s->regs[R_INTR]));
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}
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}
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s->regs[addr] = value;
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s->regs[R_INTR] &= ~value;
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D(printf("r_intr=%x\n", s->regs[R_INTR]));
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break;
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break;
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default:
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default:
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s->regs[addr] = value;
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s->regs[addr] = value;
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@ -135,11 +153,21 @@ static CPUWriteMemoryFunc * const ser_write[] = {
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static void serial_receive(void *opaque, const uint8_t *buf, int size)
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static void serial_receive(void *opaque, const uint8_t *buf, int size)
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{
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{
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struct etrax_serial *s = opaque;
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struct etrax_serial *s = opaque;
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int i;
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/* Got a byte. */
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if (s->rx_fifo_len >= 16) {
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printf("WARNING: UART dropped char.\n");
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return;
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}
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for (i = 0; i < size; i++) {
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s->rx_fifo[s->rx_fifo_pos] = buf[i];
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s->rx_fifo_pos++;
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s->rx_fifo_pos &= 15;
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s->rx_fifo_len++;
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}
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s->regs[R_INTR] |= 8;
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s->regs[RS_STAT_DIN] &= ~0xff;
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s->regs[RS_STAT_DIN] |= (buf[0] & 0xff);
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s->regs[RS_STAT_DIN] |= (1 << STAT_DAV); /* dav. */
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ser_update_irq(s);
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ser_update_irq(s);
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}
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}
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@ -149,10 +177,11 @@ static int serial_can_receive(void *opaque)
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int r;
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int r;
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/* Is the receiver enabled? */
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/* Is the receiver enabled? */
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r = s->regs[RW_REC_CTRL] & 1;
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if (!(s->regs[RW_REC_CTRL] & (1 << 3))) {
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return 0;
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}
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/* Pending rx data? */
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r = sizeof(s->rx_fifo) - s->rx_fifo_len;
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r |= !(s->regs[R_INTR] & 8);
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return r;
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return r;
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}
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}
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