mirror of https://github.com/proxmox/mirror_qemu
s390x/tcg: Implement VECTOR LOAD WITH LENGTH
We can reuse the helper introduced along with VECTOR LOAD TO BLOCK BOUNDARY. We just have to take care of converting the highest index into a length. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190307121539.12842-18-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>master
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76dbd28935
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f6c7ff6757
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@ -1008,6 +1008,8 @@
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F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC)
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F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC)
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/* VECTOR LOAD VR FROM GRS DISJOINT */
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/* VECTOR LOAD VR FROM GRS DISJOINT */
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F(0xe762, VLVGP, VRR_f, V, r2, r3, 0, 0, vlvgp, 0, IF_VEC)
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F(0xe762, VLVGP, VRR_f, V, r2, r3, 0, 0, vlvgp, 0, IF_VEC)
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/* VECTOR LOAD WITH LENGTH */
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F(0xe737, VLL, VRS_b, V, la2, r3_32u, 0, 0, vll, 0, IF_VEC)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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/* COMPARE AND SWAP AND PURGE */
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/* COMPARE AND SWAP AND PURGE */
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@ -5794,6 +5794,13 @@ static void in2_r3_sr32(DisasContext *s, DisasFields *f, DisasOps *o)
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}
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}
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#define SPEC_in2_r3_sr32 0
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#define SPEC_in2_r3_sr32 0
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static void in2_r3_32u(DisasContext *s, DisasFields *f, DisasOps *o)
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{
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o->in2 = tcg_temp_new_i64();
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tcg_gen_ext32u_i64(o->in2, regs[get_field(f, r3)]);
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}
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#define SPEC_in2_r3_32u 0
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static void in2_r2_32s(DisasContext *s, DisasFields *f, DisasOps *o)
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static void in2_r2_32s(DisasContext *s, DisasFields *f, DisasOps *o)
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{
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{
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o->in2 = tcg_temp_new_i64();
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o->in2 = tcg_temp_new_i64();
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@ -519,3 +519,16 @@ static DisasJumpType op_vlvgp(DisasContext *s, DisasOps *o)
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write_vec_element_i64(o->in2, get_field(s->fields, v1), 1, ES_64);
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write_vec_element_i64(o->in2, get_field(s->fields, v1), 1, ES_64);
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return DISAS_NEXT;
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return DISAS_NEXT;
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}
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}
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static DisasJumpType op_vll(DisasContext *s, DisasOps *o)
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{
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const int v1_offs = vec_full_reg_offset(get_field(s->fields, v1));
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TCGv_ptr a0 = tcg_temp_new_ptr();
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/* convert highest index into an actual length */
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tcg_gen_addi_i64(o->in2, o->in2, 1);
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tcg_gen_addi_ptr(a0, cpu_env, v1_offs);
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gen_helper_vll(cpu_env, a0, o->addr1, o->in2);
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tcg_temp_free_ptr(a0);
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return DISAS_NEXT;
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}
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