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hw/arm/raspi: add a skeleton implementation of the CPRMAN 

The BCM2835 CPRMAN is the clock manager of the SoC. It is composed of a
main oscillator, and several sub-components (PLLs, multiplexers, ...) to
generate the BCM2835 clock tree.

This commit adds a skeleton of the CPRMAN, with a dummy register
read/write implementation. It embeds the main oscillator (xosc) from
which all the clocks will be derived.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Luc Michel 2020-10-10 15:57:49 +02:00 committed by Peter Maydell
parent 74de7145fd
commit fc14176ba2
7 changed files with 242 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
hw/arm/bcm2835_peripherals.c
View File

@ -121,6 +121,9 @@ static void bcm2835_peripherals_init(Object *obj)
/* DWC2 */
object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
/* CPRMAN clock manager */
object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
OBJECT(&s->gpu_bus_mr));
}
@ -160,6 +163,13 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
return;
}
/* CPRMAN clock manager */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
return;
}
memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
@ -355,7 +365,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
create_unimp(s, &s->powermgt, "bcm2835-powermgt", PM_OFFSET, 0x114);
create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x2000);
create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);

163
hw/misc/bcm2835_cprman.c Normal file
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@ -0,0 +1,163 @@
/*
* BCM2835 CPRMAN clock manager
*
* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
/*
* This peripheral is roughly divided into 3 main parts:
* - the PLLs
* - the PLL channels
* - the clock muxes
*
* A main oscillator (xosc) feeds all the PLLs. Each PLLs has one or more
* channels. Those channel are then connected to the clock muxes. Each mux has
* multiples sources (usually the xosc, some of the PLL channels and some "test
* debug" clocks). A mux is configured to select a given source through its
* control register. Each mux has one output clock that also goes out of the
* CPRMAN. This output clock usually connects to another peripheral in the SoC
* (so a given mux is dedicated to a peripheral).
*
* At each level (PLL, channel and mux), the clock can be altered through
* dividers (and multipliers in case of the PLLs), and can be disabled (in this
* case, the next levels see no clock).
*
* This can be sum-up as follows (this is an example and not the actual BCM2835
* clock tree):
*
* /-->[PLL]-|->[PLL channel]--... [mux]--> to peripherals
* | |->[PLL channel] muxes takes [mux]
* | \->[PLL channel] inputs from [mux]
* | some channels [mux]
* [xosc]---|-->[PLL]-|->[PLL channel] and other srcs [mux]
* | \->[PLL channel] ...-->[mux]
* | [mux]
* \-->[PLL]--->[PLL channel] [mux]
*
* The page at https://elinux.org/The_Undocumented_Pi gives the actual clock
* tree configuration.
*/
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "migration/vmstate.h"
#include "hw/qdev-properties.h"
#include "hw/misc/bcm2835_cprman.h"
#include "hw/misc/bcm2835_cprman_internals.h"
#include "trace.h"
/* CPRMAN "top level" model */
static uint64_t cprman_read(void *opaque, hwaddr offset,
unsigned size)
{
BCM2835CprmanState *s = CPRMAN(opaque);
uint64_t r = 0;
size_t idx = offset / sizeof(uint32_t);
switch (idx) {
default:
r = s->regs[idx];
}
trace_bcm2835_cprman_read(offset, r);
return r;
}
static void cprman_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
BCM2835CprmanState *s = CPRMAN(opaque);
size_t idx = offset / sizeof(uint32_t);
if (FIELD_EX32(value, CPRMAN, PASSWORD) != CPRMAN_PASSWORD) {
trace_bcm2835_cprman_write_invalid_magic(offset, value);
return;
}
value &= ~R_CPRMAN_PASSWORD_MASK;
trace_bcm2835_cprman_write(offset, value);
s->regs[idx] = value;
}
static const MemoryRegionOps cprman_ops = {
.read = cprman_read,
.write = cprman_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
/*
* Although this hasn't been checked against real hardware, nor the
* information can be found in a datasheet, it seems reasonable because
* of the "PASSWORD" magic value found in every registers.
*/
.min_access_size = 4,
.max_access_size = 4,
.unaligned = false,
},
.impl = {
.max_access_size = 4,
},
};
static void cprman_reset(DeviceState *dev)
{
BCM2835CprmanState *s = CPRMAN(dev);
memset(s->regs, 0, sizeof(s->regs));
clock_update_hz(s->xosc, s->xosc_freq);
}
static void cprman_init(Object *obj)
{
BCM2835CprmanState *s = CPRMAN(obj);
s->xosc = clock_new(obj, "xosc");
memory_region_init_io(&s->iomem, obj, &cprman_ops,
s, "bcm2835-cprman", 0x2000);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
}
static const VMStateDescription cprman_vmstate = {
.name = TYPE_BCM2835_CPRMAN,
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(regs, BCM2835CprmanState, CPRMAN_NUM_REGS),
VMSTATE_END_OF_LIST()
}
};
static Property cprman_properties[] = {
DEFINE_PROP_UINT32("xosc-freq-hz", BCM2835CprmanState, xosc_freq, 19200000),
DEFINE_PROP_END_OF_LIST()
};
static void cprman_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->reset = cprman_reset;
dc->vmsd = &cprman_vmstate;
device_class_set_props(dc, cprman_properties);
}
static const TypeInfo cprman_info = {
.name = TYPE_BCM2835_CPRMAN,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(BCM2835CprmanState),
.class_init = cprman_class_init,
.instance_init = cprman_init,
};
static void cprman_register_types(void)
{
type_register_static(&cprman_info);
}
type_init(cprman_register_types);

1
hw/misc/meson.build
View File

@ -74,6 +74,7 @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
'bcm2835_property.c',
'bcm2835_rng.c',
'bcm2835_thermal.c',
'bcm2835_cprman.c',
))
softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c', 'zynq-xadc.c'))

5
hw/misc/trace-events
View File

@ -230,3 +230,8 @@ grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx6
# pca9552.c
pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
# bcm2835_cprman.c
bcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
bcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64

3
include/hw/arm/bcm2835_peripherals.h
View File

@ -23,6 +23,7 @@
#include "hw/misc/bcm2835_mbox.h"
#include "hw/misc/bcm2835_mphi.h"
#include "hw/misc/bcm2835_thermal.h"
#include "hw/misc/bcm2835_cprman.h"
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
@ -48,7 +49,7 @@ struct BCM2835PeripheralState {
UnimplementedDeviceState txp;
UnimplementedDeviceState armtmr;
UnimplementedDeviceState powermgt;
UnimplementedDeviceState cprman;
BCM2835CprmanState cprman;
PL011State uart0;
BCM2835AuxState aux;
BCM2835FBState fb;

37
include/hw/misc/bcm2835_cprman.h Normal file
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@ -0,0 +1,37 @@
/*
* BCM2835 CPRMAN clock manager
*
* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_MISC_CPRMAN_H
#define HW_MISC_CPRMAN_H
#include "hw/sysbus.h"
#include "hw/qdev-clock.h"
#define TYPE_BCM2835_CPRMAN "bcm2835-cprman"
typedef struct BCM2835CprmanState BCM2835CprmanState;
DECLARE_INSTANCE_CHECKER(BCM2835CprmanState, CPRMAN,
TYPE_BCM2835_CPRMAN)
#define CPRMAN_NUM_REGS (0x2000 / sizeof(uint32_t))
struct BCM2835CprmanState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
MemoryRegion iomem;
uint32_t regs[CPRMAN_NUM_REGS];
uint32_t xosc_freq;
Clock *xosc;
};
#endif

24
include/hw/misc/bcm2835_cprman_internals.h Normal file
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@ -0,0 +1,24 @@
/*
* BCM2835 CPRMAN clock manager
*
* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_MISC_CPRMAN_INTERNALS_H
#define HW_MISC_CPRMAN_INTERNALS_H
#include "hw/registerfields.h"
#include "hw/misc/bcm2835_cprman.h"
/* Register map */
/*
* This field is common to all registers. Each register write value must match
* the CPRMAN_PASSWORD magic value in its 8 MSB.
*/
FIELD(CPRMAN, PASSWORD, 24, 8)
#define CPRMAN_PASSWORD 0x5a
#endif