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* Fix emulation of the LZRF instruction 

* Fix "noexec" TCG test on s390x
 * Implement SHA-512 and random number generator instructions
 * Support for zPCI interpretation on s390x hosts
 * Removal of the "slirp" submodule
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Merge tag 'pull-request-2022-09-26' of https://gitlab.com/thuth/qemu into staging

* Fix emulation of the LZRF instruction
* Fix "noexec" TCG test on s390x
* Implement SHA-512 and random number generator instructions
* Support for zPCI interpretation on s390x hosts
* Removal of the "slirp" submodule

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# gpg: Signature made Mon 26 Sep 2022 13:04:37 EDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2022-09-26' of https://gitlab.com/thuth/qemu:
  Remove the slirp submodule (i.e. compile only with an external libslirp)
  s390x/s390-virtio-ccw: add zpcii-disable machine property
  s390x/pci: reflect proper maxstbl for groups of interpreted devices
  s390x/pci: let intercept devices have separate PCI groups
  s390x/pci: enable adapter event notification for interpreted devices
  s390x/pci: don't fence interpreted devices without MSI-X
  s390x/pci: enable for load/store interpretation
  s390x/pci: add routine to get host function handle from CLP info
  Update linux headers to v6.0-rc4
  configure: Add -Wno-gnu-variable-sized-type-not-at-end
  target/s390x: support PRNO_TRNG instruction
  target/s390x: support SHA-512 extensions
  linux-user/host/s390: Add vector instructions to host_signal_write()
  s390x/tcg: Fix opcode for lzrf

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
master
Stefan Hajnoczi 2022-09-27 11:06:52 -04:00
parent c48c9c6b33 5890258aee
commit fe65642bba
53 changed files with 1287 additions and 270 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
.gitlab-ci.d/buildtest.yml
View File

@ -41,8 +41,7 @@ build-system-ubuntu:
job: amd64-ubuntu2004-container
variables:
IMAGE: ubuntu2004
CONFIGURE_ARGS: --enable-docs --enable-fdt=system --enable-slirp=system
--enable-capstone
CONFIGURE_ARGS: --enable-docs --enable-fdt=system --enable-capstone
TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu
microblazeel-softmmu mips64el-softmmu
MAKE_CHECK_ARGS: check-build
@ -120,7 +119,7 @@ build-system-fedora:
variables:
IMAGE: fedora
CONFIGURE_ARGS: --disable-gcrypt --enable-nettle --enable-docs
--enable-fdt=system --enable-slirp=system --enable-capstone
--enable-fdt=system --enable-slirp --enable-capstone
TARGETS: tricore-softmmu microblaze-softmmu mips-softmmu
xtensa-softmmu m68k-softmmu riscv32-softmmu ppc-softmmu sparc64-softmmu
MAKE_CHECK_ARGS: check-build
@ -339,10 +338,8 @@ clang-user:
# On gitlab runners, default value sometimes end up calling 2 lds concurrently and
# triggers an Out-Of-Memory error
#
# Since slirp callbacks are used in QEMU Timers, slirp needs to be compiled together
# with QEMU and linked as a static library to avoid false positives in CFI checks.
# This can be accomplished by using -enable-slirp=git, which avoids the use of
# a system-wide version of the library
# Since slirp callbacks are used in QEMU Timers, we cannot use libslirp with
# CFI builds, and thus have to disable it here.
#
# Split in three sets of build/check/avocado to limit the execution time of each
# job
@ -355,7 +352,7 @@ build-cfi-aarch64:
AR: llvm-ar
IMAGE: fedora
CONFIGURE_ARGS: --cc=clang --cxx=clang++ --enable-cfi --enable-cfi-debug
--enable-safe-stack --enable-slirp=git
--enable-safe-stack --disable-slirp
TARGETS: aarch64-softmmu
MAKE_CHECK_ARGS: check-build
# FIXME: This job is often failing, likely due to out-of-memory problems in
@ -395,7 +392,7 @@ build-cfi-ppc64-s390x:
AR: llvm-ar
IMAGE: fedora
CONFIGURE_ARGS: --cc=clang --cxx=clang++ --enable-cfi --enable-cfi-debug
--enable-safe-stack --enable-slirp=git
--enable-safe-stack --disable-slirp
TARGETS: ppc64-softmmu s390x-softmmu
MAKE_CHECK_ARGS: check-build
# FIXME: This job is often failing, likely due to out-of-memory problems in
@ -435,7 +432,7 @@ build-cfi-x86_64:
AR: llvm-ar
IMAGE: fedora
CONFIGURE_ARGS: --cc=clang --cxx=clang++ --enable-cfi --enable-cfi-debug
--enable-safe-stack --enable-slirp=git
--enable-safe-stack --disable-slirp
TARGETS: x86_64-softmmu
MAKE_CHECK_ARGS: check-build
timeout: 70m
@ -469,7 +466,7 @@ tsan-build:
variables:
IMAGE: ubuntu2004
CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10
--enable-trace-backends=ust --enable-fdt=system --enable-slirp=system
--enable-trace-backends=ust --enable-fdt=system --disable-slirp
TARGETS: x86_64-softmmu ppc64-softmmu riscv64-softmmu x86_64-linux-user
MAKE_CHECK_ARGS: bench V=1
@ -571,7 +568,6 @@ build-without-default-features:
--disable-capstone
--disable-pie
--disable-qom-cast-debug
--disable-slirp
--disable-strip
TARGETS: avr-softmmu i386-softmmu mips64-softmmu s390x-softmmu sh4-softmmu
sparc64-softmmu hexagon-linux-user i386-linux-user s390x-linux-user

3
.gitmodules vendored
View File

@ -46,9 +46,6 @@
[submodule "roms/edk2"]
path = roms/edk2
url = https://gitlab.com/qemu-project/edk2.git
[submodule "slirp"]
path = slirp
url = https://gitlab.com/qemu-project/libslirp.git
[submodule "roms/opensbi"]
path = roms/opensbi
url = https://gitlab.com/qemu-project/opensbi.git

1
MAINTAINERS
View File

@ -2985,7 +2985,6 @@ F: include/hw/registerfields.h
SLIRP
M: Samuel Thibault <samuel.thibault@ens-lyon.org>
S: Maintained
F: slirp/
F: net/slirp.c
F: include/net/slirp.h
T: git https://people.debian.org/~sthibault/qemu.git slirp

25
configure vendored
View File

@ -319,11 +319,6 @@ vfio_user_server="disabled"
# are included in the automatically generated help message)
# 1. Track which submodules are needed
if test "$default_feature" = no ; then
slirp="disabled"
else
slirp="auto"
fi
fdt="auto"
# 2. Automatically enable/disable other options
@ -827,14 +822,6 @@ for opt do
;;
--disable-tsan) tsan="no"
;;
--disable-slirp) slirp="disabled"
;;
--enable-slirp) slirp="enabled"
;;
--enable-slirp=git) slirp="internal"
;;
--enable-slirp=*) slirp="$optarg"
;;
--disable-tcg) tcg="disabled"
plugins="no"
;;
@ -1253,6 +1240,7 @@ add_to nowarn_flags -Wno-string-plus-int
add_to nowarn_flags -Wno-typedef-redefinition
add_to nowarn_flags -Wno-tautological-type-limit-compare
add_to nowarn_flags -Wno-psabi
add_to nowarn_flags -Wno-gnu-variable-sized-type-not-at-end
gcc_flags="$warn_flags $nowarn_flags"
@ -1817,16 +1805,6 @@ EOF
fi
fi
##########################################
# check for slirp
case "$slirp" in
auto | enabled | internal)
# Simpler to always update submodule, even if not needed.
git_submodules="${git_submodules} slirp"
;;
esac
##########################################
# functions to probe cross compilers
@ -2734,7 +2712,6 @@ if test "$skip_meson" = no; then
test "$fdt" != auto && meson_option_add "-Dfdt=$fdt"
test -n "${LIB_FUZZING_ENGINE+xxx}" && meson_option_add "-Dfuzzing_engine=$LIB_FUZZING_ENGINE"
test "$qemu_suffix" != qemu && meson_option_add "-Dqemu_suffix=$qemu_suffix"
test "$slirp" != auto && meson_option_add "-Dslirp=$slirp"
test "$smbd" != '' && meson_option_add "-Dsmbd=$smbd"
test "$tcg" != enabled && meson_option_add "-Dtcg=$tcg"
test "$vfio_user_server" != auto && meson_option_add "-Dvfio_user_server=$vfio_user_server"

1
hw/s390x/meson.build
View File

@ -23,6 +23,7 @@ s390x_ss.add(when: 'CONFIG_KVM', if_true: files(
's390-skeys-kvm.c',
's390-stattrib-kvm.c',
'pv.c',
's390-pci-kvm.c',
))
s390x_ss.add(when: 'CONFIG_TCG', if_true: files(
'tod-tcg.c',

111
hw/s390x/s390-pci-bus.c
View File

@ -16,6 +16,7 @@
#include "qapi/visitor.h"
#include "hw/s390x/s390-pci-bus.h"
#include "hw/s390x/s390-pci-inst.h"
#include "hw/s390x/s390-pci-kvm.h"
#include "hw/s390x/s390-pci-vfio.h"
#include "hw/pci/pci_bus.h"
#include "hw/qdev-properties.h"
@ -189,7 +190,10 @@ void s390_pci_sclp_deconfigure(SCCB *sccb)
rc = SCLP_RC_NO_ACTION_REQUIRED;
break;
default:
if (pbdev->summary_ind) {
if (pbdev->interp && (pbdev->fh & FH_MASK_ENABLE)) {
/* Interpreted devices were using interrupt forwarding */
s390_pci_kvm_aif_disable(pbdev);
} else if (pbdev->summary_ind) {
pci_dereg_irqs(pbdev);
}
if (pbdev->iommu->enabled) {
@ -744,13 +748,14 @@ static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn)
object_unref(OBJECT(iommu));
}
S390PCIGroup *s390_group_create(int id)
S390PCIGroup *s390_group_create(int id, int host_id)
{
S390PCIGroup *group;
S390pciState *s = s390_get_phb();
group = g_new0(S390PCIGroup, 1);
group->id = id;
group->host_id = host_id;
QTAILQ_INSERT_TAIL(&s->zpci_groups, group, link);
return group;
}
@ -768,12 +773,25 @@ S390PCIGroup *s390_group_find(int id)
return NULL;
}
S390PCIGroup *s390_group_find_host_sim(int host_id)
{
S390PCIGroup *group;
S390pciState *s = s390_get_phb();
QTAILQ_FOREACH(group, &s->zpci_groups, link) {
if (group->id >= ZPCI_SIM_GRP_START && group->host_id == host_id) {
return group;
}
}
return NULL;
}
static void s390_pci_init_default_group(void)
{
S390PCIGroup *group;
ClpRspQueryPciGrp *resgrp;
group = s390_group_create(ZPCI_DEFAULT_FN_GRP);
group = s390_group_create(ZPCI_DEFAULT_FN_GRP, ZPCI_DEFAULT_FN_GRP);
resgrp = &group->zpci_group;
resgrp->fr = 1;
resgrp->dasm = 0;
@ -821,6 +839,7 @@ static void s390_pcihost_realize(DeviceState *dev, Error **errp)
NULL, g_free);
s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL);
s->bus_no = 0;
s->next_sim_grp = ZPCI_SIM_GRP_START;
QTAILQ_INIT(&s->pending_sei);
QTAILQ_INIT(&s->zpci_devs);
QTAILQ_INIT(&s->zpci_dma_limit);
@ -880,6 +899,10 @@ static int s390_pci_msix_init(S390PCIBusDevice *pbdev)
static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
{
if (pbdev->msix.entries == 0) {
return;
}
memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
object_unparent(OBJECT(&pbdev->msix_notify_mr));
}
@ -971,12 +994,51 @@ static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr)
}
}
static int s390_pci_interp_plug(S390pciState *s, S390PCIBusDevice *pbdev)
{
uint32_t idx, fh;
if (!s390_pci_get_host_fh(pbdev, &fh)) {
return -EPERM;
}
/*
* The host device is already in an enabled state, but we always present
* the initial device state to the guest as disabled (ZPCI_FS_DISABLED).
* Therefore, mask off the enable bit from the passthrough handle until
* the guest issues a CLP SET PCI FN later to enable the device.
*/
pbdev->fh = fh & ~FH_MASK_ENABLE;
/* Next, see if the idx is already in-use */
idx = pbdev->fh & FH_MASK_INDEX;
if (pbdev->idx != idx) {
if (s390_pci_find_dev_by_idx(s, idx)) {
return -EINVAL;
}
/*
* Update the idx entry with the passed through idx
* If the relinquished idx is lower than next_idx, use it
* to replace next_idx
*/
g_hash_table_remove(s->zpci_table, &pbdev->idx);
if (idx < s->next_idx) {
s->next_idx = idx;
}
pbdev->idx = idx;
g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
}
return 0;
}
static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp)
{
S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
PCIDevice *pdev = NULL;
S390PCIBusDevice *pbdev = NULL;
int rc;
if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
PCIBridge *pb = PCI_BRIDGE(dev);
@ -1022,15 +1084,41 @@ static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
set_pbdev_info(pbdev);
if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
pbdev->fh |= FH_SHM_VFIO;
/*
* By default, interpretation is always requested; if the available
* facilities indicate it is not available, fallback to the
* interception model.
*/
if (pbdev->interp) {
if (s390_pci_kvm_interp_allowed()) {
rc = s390_pci_interp_plug(s, pbdev);
if (rc) {
error_setg(errp, "Plug failed for zPCI device in "
"interpretation mode: %d", rc);
return;
}
} else {
DPRINTF("zPCI interpretation facilities missing.\n");
pbdev->interp = false;
pbdev->forwarding_assist = false;
}
}
pbdev->iommu->dma_limit = s390_pci_start_dma_count(s, pbdev);
/* Fill in CLP information passed via the vfio region */
s390_pci_get_clp_info(pbdev);
if (!pbdev->interp) {
/* Do vfio passthrough but intercept for I/O */
pbdev->fh |= FH_SHM_VFIO;
pbdev->forwarding_assist = false;
}
} else {
pbdev->fh |= FH_SHM_EMUL;
/* Always intercept emulated devices */
pbdev->interp = false;
pbdev->forwarding_assist = false;
}
if (s390_pci_msix_init(pbdev)) {
if (s390_pci_msix_init(pbdev) && !pbdev->interp) {
error_setg(errp, "MSI-X support is mandatory "
"in the S390 architecture");
return;
@ -1177,7 +1265,10 @@ static void s390_pcihost_reset(DeviceState *dev)
/* Process all pending unplug requests */
QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) {
if (pbdev->unplug_requested) {
if (pbdev->summary_ind) {
if (pbdev->interp && (pbdev->fh & FH_MASK_ENABLE)) {
/* Interpreted devices were using interrupt forwarding */
s390_pci_kvm_aif_disable(pbdev);
} else if (pbdev->summary_ind) {
pci_dereg_irqs(pbdev);
}
if (pbdev->iommu->enabled) {
@ -1315,7 +1406,10 @@ static void s390_pci_device_reset(DeviceState *dev)
break;
}
if (pbdev->summary_ind) {
if (pbdev->interp && (pbdev->fh & FH_MASK_ENABLE)) {
/* Interpreted devices were using interrupt forwarding */
s390_pci_kvm_aif_disable(pbdev);
} else if (pbdev->summary_ind) {
pci_dereg_irqs(pbdev);
}
if (pbdev->iommu->enabled) {
@ -1360,6 +1454,9 @@ static Property s390_pci_device_properties[] = {
DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
DEFINE_PROP_BOOL("interpret", S390PCIBusDevice, interp, true),
DEFINE_PROP_BOOL("forwarding-assist", S390PCIBusDevice, forwarding_assist,
true),
DEFINE_PROP_END_OF_LIST(),
};

56
hw/s390x/s390-pci-inst.c
View File

@ -18,6 +18,8 @@
#include "sysemu/hw_accel.h"
#include "hw/s390x/s390-pci-inst.h"
#include "hw/s390x/s390-pci-bus.h"
#include "hw/s390x/s390-pci-kvm.h"
#include "hw/s390x/s390-pci-vfio.h"
#include "hw/s390x/tod.h"
#ifndef DEBUG_S390PCI_INST
@ -246,6 +248,20 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra)
goto out;
}
/*
* Take this opportunity to make sure we still have an accurate
* host fh. It's possible part of the handle changed while the
* device was disabled to the guest (e.g. vfio hot reset for
* ISM during plug)
*/
if (pbdev->interp) {
/* Take this opportunity to make sure we are sync'd with host */
if (!s390_pci_get_host_fh(pbdev, &pbdev->fh) ||
!(pbdev->fh & FH_MASK_ENABLE)) {
stw_p(&ressetpci->hdr.rsp, CLP_RC_SETPCIFN_FH);
goto out;
}
}
pbdev->fh |= FH_MASK_ENABLE;
pbdev->state = ZPCI_FS_ENABLED;
stl_p(&ressetpci->fh, pbdev->fh);
@ -1050,6 +1066,32 @@ static void fmb_update(void *opaque)
timer_mod(pbdev->fmb_timer, t + pbdev->pci_group->zpci_group.mui);
}
static int mpcifc_reg_int_interp(S390PCIBusDevice *pbdev, ZpciFib *fib)
{
int rc;
rc = s390_pci_kvm_aif_enable(pbdev, fib, pbdev->forwarding_assist);
if (rc) {
DPRINTF("Failed to enable interrupt forwarding\n");
return rc;
}
return 0;
}
static int mpcifc_dereg_int_interp(S390PCIBusDevice *pbdev, ZpciFib *fib)
{
int rc;
rc = s390_pci_kvm_aif_disable(pbdev);
if (rc) {
DPRINTF("Failed to disable interrupt forwarding\n");
return rc;
}
return 0;
}
int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
uintptr_t ra)
{
@ -1104,7 +1146,12 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
switch (oc) {
case ZPCI_MOD_FC_REG_INT:
if (pbdev->summary_ind) {
if (pbdev->interp) {
if (mpcifc_reg_int_interp(pbdev, &fib)) {
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
}
} else if (pbdev->summary_ind) {
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
} else if (reg_irqs(env, pbdev, fib)) {
@ -1113,7 +1160,12 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
}
break;
case ZPCI_MOD_FC_DEREG_INT:
if (!pbdev->summary_ind) {
if (pbdev->interp) {
if (mpcifc_dereg_int_interp(pbdev, &fib)) {
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
}
} else if (!pbdev->summary_ind) {
cc = ZPCI_PCI_LS_ERR;
s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
} else {

54
hw/s390x/s390-pci-kvm.c Normal file
View File

@ -0,0 +1,54 @@
/*
* s390 zPCI KVM interfaces
*
* Copyright 2022 IBM Corp.
* Author(s): Matthew Rosato <mjrosato@linux.ibm.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or (at
* your option) any later version. See the COPYING file in the top-level
* directory.
*/
#include "qemu/osdep.h"
#include <linux/kvm.h>
#include "kvm/kvm_s390x.h"
#include "hw/s390x/pv.h"
#include "hw/s390x/s390-pci-bus.h"
#include "hw/s390x/s390-pci-kvm.h"
#include "hw/s390x/s390-pci-inst.h"
#include "cpu_models.h"
bool s390_pci_kvm_interp_allowed(void)
{
return (kvm_s390_get_zpci_op() && !s390_is_pv() &&
!object_property_get_bool(OBJECT(qdev_get_machine()),
"zpcii-disable", NULL));
}
int s390_pci_kvm_aif_enable(S390PCIBusDevice *pbdev, ZpciFib *fib, bool assist)
{
struct kvm_s390_zpci_op args = {
.fh = pbdev->fh,
.op = KVM_S390_ZPCIOP_REG_AEN,
.u.reg_aen.ibv = fib->aibv,
.u.reg_aen.sb = fib->aisb,
.u.reg_aen.noi = FIB_DATA_NOI(fib->data),
.u.reg_aen.isc = FIB_DATA_ISC(fib->data),
.u.reg_aen.sbo = FIB_DATA_AISBO(fib->data),
.u.reg_aen.flags = (assist) ? 0 : KVM_S390_ZPCIOP_REGAEN_HOST
};
return kvm_vm_ioctl(kvm_state, KVM_S390_ZPCI_OP, &args);
}
int s390_pci_kvm_aif_disable(S390PCIBusDevice *pbdev)
{
struct kvm_s390_zpci_op args = {
.fh = pbdev->fh,
.op = KVM_S390_ZPCIOP_DEREG_AEN
};
return kvm_vm_ioctl(kvm_state, KVM_S390_ZPCI_OP, &args);
}

129
hw/s390x/s390-pci-vfio.c
View File

@ -124,18 +124,44 @@ static void s390_pci_read_base(S390PCIBusDevice *pbdev,
pbdev->zpci_fn.pft = 0;
}
static bool get_host_fh(S390PCIBusDevice *pbdev, struct vfio_device_info *info,
uint32_t *fh)
{
struct vfio_info_cap_header *hdr;
struct vfio_device_info_cap_zpci_base *cap;
VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev);
hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_BASE);
/* Can only get the host fh with version 2 or greater */
if (hdr == NULL || hdr->version < 2) {
trace_s390_pci_clp_cap(vpci->vbasedev.name,
VFIO_DEVICE_INFO_CAP_ZPCI_BASE);
return false;
}
cap = (void *) hdr;
*fh = cap->fh;
return true;
}
static void s390_pci_read_group(S390PCIBusDevice *pbdev,
struct vfio_device_info *info)
{
struct vfio_info_cap_header *hdr;
struct vfio_device_info_cap_zpci_group *cap;
S390pciState *s = s390_get_phb();
ClpRspQueryPciGrp *resgrp;
VFIOPCIDevice *vpci = container_of(pbdev->pdev, VFIOPCIDevice, pdev);
uint8_t start_gid = pbdev->zpci_fn.pfgid;
hdr = vfio_get_device_info_cap(info, VFIO_DEVICE_INFO_CAP_ZPCI_GROUP);
/* If capability not provided, just use the default group */
if (hdr == NULL) {
/*
* If capability not provided or the underlying hostdev is simulated, just
* use the default group.
*/
if (hdr == NULL || pbdev->zpci_fn.pfgid >= ZPCI_SIM_GRP_START) {
trace_s390_pci_clp_cap(vpci->vbasedev.name,
VFIO_DEVICE_INFO_CAP_ZPCI_GROUP);
pbdev->zpci_fn.pfgid = ZPCI_DEFAULT_FN_GRP;
@ -144,11 +170,40 @@ static void s390_pci_read_group(S390PCIBusDevice *pbdev,
}
cap = (void *) hdr;
/*
* For an intercept device, let's use an existing simulated group if one
* one was already created for other intercept devices in this group.
* If not, create a new simulated group if any are still available.
* If all else fails, just fall back on the default group.
*/
if (!pbdev->interp) {
pbdev->pci_group = s390_group_find_host_sim(pbdev->zpci_fn.pfgid);
if (pbdev->pci_group) {
/* Use existing simulated group */
pbdev->zpci_fn.pfgid = pbdev->pci_group->id;
return;
} else {
if (s->next_sim_grp == ZPCI_DEFAULT_FN_GRP) {
/* All out of simulated groups, use default */
trace_s390_pci_clp_cap(vpci->vbasedev.name,
VFIO_DEVICE_INFO_CAP_ZPCI_GROUP);
pbdev->zpci_fn.pfgid = ZPCI_DEFAULT_FN_GRP;
pbdev->pci_group = s390_group_find(ZPCI_DEFAULT_FN_GRP);
return;
} else {
/* We can assign a new simulated group */
pbdev->zpci_fn.pfgid = s->next_sim_grp;
s->next_sim_grp++;
/* Fall through to create the new sim group using CLP info */
}
}
}
/* See if the PCI group is already defined, create if not */
pbdev->pci_group = s390_group_find(pbdev->zpci_fn.pfgid);
if (!pbdev->pci_group) {
pbdev->pci_group = s390_group_create(pbdev->zpci_fn.pfgid);
pbdev->pci_group = s390_group_create(pbdev->zpci_fn.pfgid, start_gid);
resgrp = &pbdev->pci_group->zpci_group;
if (cap->flags & VFIO_DEVICE_INFO_ZPCI_FLAG_REFRESH) {
@ -158,7 +213,11 @@ static void s390_pci_read_group(S390PCIBusDevice *pbdev,
resgrp->msia = cap->msi_addr;
resgrp->mui = cap->mui;
resgrp->i = cap->noi;
resgrp->maxstbl = cap->maxstbl;
if (pbdev->interp && hdr->version >= 2) {
resgrp->maxstbl = cap->imaxstbl;
} else {
resgrp->maxstbl = cap->maxstbl;
}
resgrp->version = cap->version;
resgrp->dtsm = ZPCI_DTSM;
}
@ -217,25 +276,13 @@ static void s390_pci_read_pfip(S390PCIBusDevice *pbdev,
memcpy(pbdev->zpci_fn.pfip, cap->pfip, CLP_PFIP_NR_SEGMENTS);
}
/*
* This function will issue the VFIO_DEVICE_GET_INFO ioctl and look for
* capabilities that contain information about CLP features provided by the
* underlying host.
* On entry, defaults have already been placed into the guest CLP response
* buffers. On exit, defaults will have been overwritten for any CLP features
* found in the capability chain; defaults will remain for any CLP features not
* found in the chain.
*/
void s390_pci_get_clp_info(S390PCIBusDevice *pbdev)
static struct vfio_device_info *get_device_info(S390PCIBusDevice *pbdev,
uint32_t argsz)
{
g_autofree struct vfio_device_info *info = NULL;
struct vfio_device_info *info = g_malloc0(argsz);
VFIOPCIDevice *vfio_pci;
uint32_t argsz;
int fd;
argsz = sizeof(*info);
info = g_malloc0(argsz);
vfio_pci = container_of(pbdev->pdev, VFIOPCIDevice, pdev);
fd = vfio_pci->vbasedev.fd;
@ -250,7 +297,8 @@ retry:
if (ioctl(fd, VFIO_DEVICE_GET_INFO, info)) {
trace_s390_pci_clp_dev_info(vfio_pci->vbasedev.name);
return;
g_free(info);
return NULL;
}
if (info->argsz > argsz) {
@ -259,6 +307,47 @@ retry:
goto retry;
}
return info;
}
/*
* Get the host function handle from the vfio CLP capabilities chain. Returns
* true if a fh value was placed into the provided buffer. Returns false
* if a fh could not be obtained (ioctl failed or capabilitiy version does
* not include the fh)
*/
bool s390_pci_get_host_fh(S390PCIBusDevice *pbdev, uint32_t *fh)
{
g_autofree struct vfio_device_info *info = NULL;
assert(fh);
info = get_device_info(pbdev, sizeof(*info));
if (!info) {
return false;
}
return get_host_fh(pbdev, info, fh);
}
/*
* This function will issue the VFIO_DEVICE_GET_INFO ioctl and look for
* capabilities that contain information about CLP features provided by the
* underlying host.
* On entry, defaults have already been placed into the guest CLP response
* buffers. On exit, defaults will have been overwritten for any CLP features
* found in the capability chain; defaults will remain for any CLP features not
* found in the chain.
*/
void s390_pci_get_clp_info(S390PCIBusDevice *pbdev)
{
g_autofree struct vfio_device_info *info = NULL;
info = get_device_info(pbdev, sizeof(*info));
if (!info) {
return;
}
/*
* Find the CLP features provided and fill in the guest CLP responses.
* Always call s390_pci_read_base first as information from this could

27
hw/s390x/s390-virtio-ccw.c
View File

@ -645,6 +645,21 @@ static inline void machine_set_dea_key_wrap(Object *obj, bool value,
ms->dea_key_wrap = value;
}
static inline bool machine_get_zpcii_disable(Object *obj, Error **errp)
{
S390CcwMachineState *ms = S390_CCW_MACHINE(obj);
return ms->zpcii_disable;
}
static inline void machine_set_zpcii_disable(Object *obj, bool value,
Error **errp)
{
S390CcwMachineState *ms = S390_CCW_MACHINE(obj);
ms->zpcii_disable = value;
}
static S390CcwMachineClass *current_mc;
/*
@ -740,6 +755,13 @@ static inline void s390_machine_initfn(Object *obj)
"Up to 8 chars in set of [A-Za-z0-9. ] (lower case chars converted"
" to upper case) to pass to machine loader, boot manager,"
" and guest kernel");
object_property_add_bool(obj, "zpcii-disable",
machine_get_zpcii_disable,
machine_set_zpcii_disable);
object_property_set_description(obj, "zpcii-disable",
"disable zPCI interpretation facilties");
object_property_set_bool(obj, "zpcii-disable", false, NULL);
}
static const TypeInfo ccw_machine_info = {
@ -803,8 +825,13 @@ DEFINE_CCW_MACHINE(7_2, "7.2", true);
static void ccw_machine_7_1_instance_options(MachineState *machine)
{
static const S390FeatInit qemu_cpu_feat = { S390_FEAT_LIST_QEMU_V7_1 };
S390CcwMachineState *ms = S390_CCW_MACHINE(machine);
ccw_machine_7_2_instance_options(machine);
s390_cpudef_featoff_greater(16, 1, S390_FEAT_PAIE);
s390_set_qemu_cpu_model(0x8561, 15, 1, qemu_cpu_feat);
ms->zpcii_disable = true;
}
static void ccw_machine_7_1_class_options(MachineClass *mc)

8
include/hw/s390x/s390-pci-bus.h
View File

@ -315,13 +315,16 @@ typedef struct ZpciFmb {
QEMU_BUILD_BUG_MSG(offsetof(ZpciFmb, fmt0) != 48, "padding in ZpciFmb");
#define ZPCI_DEFAULT_FN_GRP 0xFF
#define ZPCI_SIM_GRP_START 0xF0
typedef struct S390PCIGroup {
ClpRspQueryPciGrp zpci_group;
int id;
int host_id;
QTAILQ_ENTRY(S390PCIGroup) link;
} S390PCIGroup;
S390PCIGroup *s390_group_create(int id);
S390PCIGroup *s390_group_create(int id, int host_id);
S390PCIGroup *s390_group_find(int id);
S390PCIGroup *s390_group_find_host_sim(int host_id);
struct S390PCIBusDevice {
DeviceState qdev;
@ -350,6 +353,8 @@ struct S390PCIBusDevice {
IndAddr *indicator;
bool pci_unplug_request_processed;
bool unplug_requested;
bool interp;
bool forwarding_assist;
QTAILQ_ENTRY(S390PCIBusDevice) link;
};
@ -368,6 +373,7 @@ struct S390pciState {
QTAILQ_HEAD(, S390PCIBusDevice) zpci_devs;
QTAILQ_HEAD(, S390PCIDMACount) zpci_dma_limit;
QTAILQ_HEAD(, S390PCIGroup) zpci_groups;
uint8_t next_sim_grp;
};
S390pciState *s390_get_phb(void);

38
include/hw/s390x/s390-pci-kvm.h Normal file
View File

@ -0,0 +1,38 @@
/*
* s390 PCI KVM interfaces
*
* Copyright 2022 IBM Corp.
* Author(s): Matthew Rosato <mjrosato@linux.ibm.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or (at
* your option) any later version. See the COPYING file in the top-level
* directory.
*/
#ifndef HW_S390_PCI_KVM_H
#define HW_S390_PCI_KVM_H
#include "hw/s390x/s390-pci-bus.h"
#include "hw/s390x/s390-pci-inst.h"
#ifdef CONFIG_KVM
bool s390_pci_kvm_interp_allowed(void);
int s390_pci_kvm_aif_enable(S390PCIBusDevice *pbdev, ZpciFib *fib, bool assist);
int s390_pci_kvm_aif_disable(S390PCIBusDevice *pbdev);
#else
static inline bool s390_pci_kvm_interp_allowed(void)
{
return false;
}
static inline int s390_pci_kvm_aif_enable(S390PCIBusDevice *pbdev, ZpciFib *fib,
bool assist)
{
return -EINVAL;
}
static inline int s390_pci_kvm_aif_disable(S390PCIBusDevice *pbdev)
{
return -EINVAL;
}
#endif
#endif

5
include/hw/s390x/s390-pci-vfio.h
View File

@ -20,6 +20,7 @@ bool s390_pci_update_dma_avail(int fd, unsigned int *avail);
S390PCIDMACount *s390_pci_start_dma_count(S390pciState *s,
S390PCIBusDevice *pbdev);
void s390_pci_end_dma_count(S390pciState *s, S390PCIDMACount *cnt);
bool s390_pci_get_host_fh(S390PCIBusDevice *pbdev, uint32_t *fh);
void s390_pci_get_clp_info(S390PCIBusDevice *pbdev);
#else
static inline bool s390_pci_update_dma_avail(int fd, unsigned int *avail)
@ -33,6 +34,10 @@ static inline S390PCIDMACount *s390_pci_start_dma_count(S390pciState *s,
}
static inline void s390_pci_end_dma_count(S390pciState *s,
S390PCIDMACount *cnt) { }
static inline bool s390_pci_get_host_fh(S390PCIBusDevice *pbdev, uint32_t *fh)
{
return false;
}
static inline void s390_pci_get_clp_info(S390PCIBusDevice *pbdev) { }
#endif

1
include/hw/s390x/s390-virtio-ccw.h
View File

@ -27,6 +27,7 @@ struct S390CcwMachineState {
bool aes_key_wrap;
bool dea_key_wrap;
bool pv;
bool zpcii_disable;
uint8_t loadparm[8];
};

7
include/standard-headers/asm-x86/bootparam.h
View File

@ -10,12 +10,13 @@
#define SETUP_EFI 4
#define SETUP_APPLE_PROPERTIES 5
#define SETUP_JAILHOUSE 6
#define SETUP_CC_BLOB 7
#define SETUP_IMA 8
#define SETUP_RNG_SEED 9
#define SETUP_ENUM_MAX SETUP_RNG_SEED
#define SETUP_INDIRECT (1<<31)
/* SETUP_INDIRECT | max(SETUP_*) */
#define SETUP_TYPE_MAX (SETUP_INDIRECT | SETUP_JAILHOUSE)
#define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT)
/* ram_size flags */
#define RAMDISK_IMAGE_START_MASK 0x07FF

73
include/standard-headers/drm/drm_fourcc.h
View File

@ -558,7 +558,7 @@ extern "C" {
*
* The main surface is Y-tiled and is at plane index 0 whereas CCS is linear
* and at index 1. The clear color is stored at index 2, and the pitch should
* be ignored. The clear color structure is 256 bits. The first 128 bits
* be 64 bytes aligned. The clear color structure is 256 bits. The first 128 bits
* represents Raw Clear Color Red, Green, Blue and Alpha color each represented
* by 32 bits. The raw clear color is consumed by the 3d engine and generates
* the converted clear color of size 64 bits. The first 32 bits store the Lower
@ -571,6 +571,53 @@ extern "C" {
*/
#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8)
/*
* Intel Tile 4 layout
*
* This is a tiled layout using 4KB tiles in a row-major layout. It has the same
* shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It
* only differs from Tile Y at the 256B granularity in between. At this
* granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape
* of 64B x 8 rows.
*/
#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9)
/*
* Intel color control surfaces (CCS) for DG2 render compression.
*
* The main surface is Tile 4 and at plane index 0. The CCS data is stored
* outside of the GEM object in a reserved memory area dedicated for the
* storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
* main surface pitch is required to be a multiple of four Tile 4 widths.
*/
#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10)
/*
* Intel color control surfaces (CCS) for DG2 media compression.
*
* The main surface is Tile 4 and at plane index 0. For semi-planar formats
* like NV12, the Y and UV planes are Tile 4 and are located at plane indices
* 0 and 1, respectively. The CCS for all planes are stored outside of the
* GEM object in a reserved memory area dedicated for the storage of the
* CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface
* pitch is required to be a multiple of four Tile 4 widths.
*/
#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11)
/*
* Intel Color Control Surface with Clear Color (CCS) for DG2 render compression.
*
* The main surface is Tile 4 and at plane index 0. The CCS data is stored
* outside of the GEM object in a reserved memory area dedicated for the
* storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
* main surface pitch is required to be a multiple of four Tile 4 widths. The
* clear color is stored at plane index 1 and the pitch should be 64 bytes
* aligned. The format of the 256 bits of clear color data matches the one used
* for the I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description
* for details.
*/
#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12)
/*
* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
*
@ -608,6 +655,28 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
/*
* Qualcomm Tiled Format
*
* Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed.
* Implementation may be platform and base-format specific.
*
* Each macrotile consists of m x n (mostly 4 x 4) tiles.
* Pixel data pitch/stride is aligned with macrotile width.
* Pixel data height is aligned with macrotile height.
* Entire pixel data buffer is aligned with 4k(bytes).
*/
#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3)
/*
* Qualcomm Alternate Tiled Format
*
* Alternate tiled format typically only used within GMEM.
* Implementation may be platform and base-format specific.
*/
#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2)
/* Vivante framebuffer modifiers */
/*
@ -1293,6 +1362,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
#define AMD_FMT_MOD_TILE_VER_GFX9 1
#define AMD_FMT_MOD_TILE_VER_GFX10 2
#define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
#define AMD_FMT_MOD_TILE_VER_GFX11 4
/*
* 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@ -1308,6 +1378,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
#define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
#define AMD_FMT_MOD_DCC_BLOCK_64B 0
#define AMD_FMT_MOD_DCC_BLOCK_128B 1

29
include/standard-headers/linux/ethtool.h
View File

@ -257,7 +257,7 @@ struct ethtool_tunable {
uint32_t id;
uint32_t type_id;
uint32_t len;
void *data[0];
void *data[];
};
#define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff
@ -322,7 +322,7 @@ struct ethtool_regs {
uint32_t cmd;
uint32_t version;
uint32_t len;
uint8_t data[0];
uint8_t data[];
};
/**
@ -348,7 +348,7 @@ struct ethtool_eeprom {
uint32_t magic;
uint32_t offset;
uint32_t len;
uint8_t data[0];
uint8_t data[];
};
/**
@ -752,7 +752,7 @@ struct ethtool_gstrings {
uint32_t cmd;
uint32_t string_set;
uint32_t len;
uint8_t data[0];
uint8_t data[];
};
/**
@ -777,7 +777,7 @@ struct ethtool_sset_info {
uint32_t cmd;
uint32_t reserved;
uint64_t sset_mask;
uint32_t data[0];
uint32_t data[];
};
/**
@ -817,7 +817,7 @@ struct ethtool_test {
uint32_t flags;
uint32_t reserved;
uint32_t len;
uint64_t data[0];
uint64_t data[];
};
/**
@ -834,7 +834,7 @@ struct ethtool_test {
struct ethtool_stats {
uint32_t cmd;
uint32_t n_stats;
uint64_t data[0];
uint64_t data[];
};
/**
@ -851,7 +851,7 @@ struct ethtool_stats {
struct ethtool_perm_addr {
uint32_t cmd;
uint32_t size;
uint8_t data[0];
uint8_t data[];
};
/* boolean flags controlling per-interface behavior characteristics.
@ -1160,7 +1160,7 @@ struct ethtool_rxnfc {
struct ethtool_rxfh_indir {
uint32_t cmd;
uint32_t size;
uint32_t ring_index[0];
uint32_t ring_index[];
};
/**
@ -1201,7 +1201,7 @@ struct ethtool_rxfh {
uint8_t hfunc;
uint8_t rsvd8[3];
uint32_t rsvd32;
uint32_t rss_config[0];
uint32_t rss_config[];
};
#define ETH_RXFH_CONTEXT_ALLOC 0xffffffff
#define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff
@ -1286,7 +1286,7 @@ struct ethtool_dump {
uint32_t version;
uint32_t flag;
uint32_t len;
uint8_t data[0];
uint8_t data[];
};
#define ETH_FW_DUMP_DISABLE 0
@ -1318,7 +1318,7 @@ struct ethtool_get_features_block {
struct ethtool_gfeatures {
uint32_t cmd;
uint32_t size;
struct ethtool_get_features_block features[0];
struct ethtool_get_features_block features[];
};
/**
@ -1340,7 +1340,7 @@ struct ethtool_set_features_block {
struct ethtool_sfeatures {
uint32_t cmd;
uint32_t size;
struct ethtool_set_features_block features[0];
struct ethtool_set_features_block features[];
};
/**
@ -1691,6 +1691,7 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89,
ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90,
ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91,
ETHTOOL_LINK_MODE_10baseT1L_Full_BIT = 92,
/* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS
};
@ -2086,7 +2087,7 @@ struct ethtool_link_settings {
uint8_t master_slave_state;
uint8_t reserved1[1];
uint32_t reserved[7];
uint32_t link_mode_masks[0];
uint32_t link_mode_masks[];
/* layout of link_mode_masks fields:
* uint32_t map_supported[link_mode_masks_nwords];
* uint32_t map_advertising[link_mode_masks_nwords];

12
include/standard-headers/linux/input.h
View File

@ -75,10 +75,13 @@ struct input_id {
* Note that input core does not clamp reported values to the
* [minimum, maximum] limits, such task is left to userspace.
*
* The default resolution for main axes (ABS_X, ABS_Y, ABS_Z)
* is reported in units per millimeter (units/mm), resolution
* for rotational axes (ABS_RX, ABS_RY, ABS_RZ) is reported
* in units per radian.
* The default resolution for main axes (ABS_X, ABS_Y, ABS_Z,
* ABS_MT_POSITION_X, ABS_MT_POSITION_Y) is reported in units
* per millimeter (units/mm), resolution for rotational axes
* (ABS_RX, ABS_RY, ABS_RZ) is reported in units per radian.
* The resolution for the size axes (ABS_MT_TOUCH_MAJOR,
* ABS_MT_TOUCH_MINOR, ABS_MT_WIDTH_MAJOR, ABS_MT_WIDTH_MINOR)
* is reported in units per millimeter (units/mm).
* When INPUT_PROP_ACCELEROMETER is set the resolution changes.
* The main axes (ABS_X, ABS_Y, ABS_Z) are then reported in
* units per g (units/g) and in units per degree per second
@ -268,6 +271,7 @@ struct input_mask {
#define BUS_RMI 0x1D
#define BUS_CEC 0x1E
#define BUS_INTEL_ISHTP 0x1F
#define BUS_AMD_SFH 0x20
/*
* MT_TOOL types

30
include/standard-headers/linux/pci_regs.h
View File

@ -616,6 +616,7 @@
#define PCI_EXP_SLTCTL_PWR_OFF 0x0400 /* Power Off */
#define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTCTL_ASPL_DISABLE 0x2000 /* Auto Slot Power Limit Disable */
#define PCI_EXP_SLTCTL_IBPD_DISABLE 0x4000 /* In-band PD disable */
#define PCI_EXP_SLTSTA 0x1a /* Slot Status */
#define PCI_EXP_SLTSTA_ABP 0x0001 /* Attention Button Pressed */
@ -736,7 +737,8 @@
#define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
#define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_16GT
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
#define PCI_EXT_CAP_DSN_SIZEOF 12
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@ -1102,4 +1104,30 @@
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
/* Data Object Exchange */
#define PCI_DOE_CAP 0x04 /* DOE Capabilities Register */
#define PCI_DOE_CAP_INT_SUP 0x00000001 /* Interrupt Support */
#define PCI_DOE_CAP_INT_MSG_NUM 0x00000ffe /* Interrupt Message Number */
#define PCI_DOE_CTRL 0x08 /* DOE Control Register */
#define PCI_DOE_CTRL_ABORT 0x00000001 /* DOE Abort */
#define PCI_DOE_CTRL_INT_EN 0x00000002 /* DOE Interrupt Enable */
#define PCI_DOE_CTRL_GO 0x80000000 /* DOE Go */
#define PCI_DOE_STATUS 0x0c /* DOE Status Register */
#define PCI_DOE_STATUS_BUSY 0x00000001 /* DOE Busy */
#define PCI_DOE_STATUS_INT_STATUS 0x00000002 /* DOE Interrupt Status */
#define PCI_DOE_STATUS_ERROR 0x00000004 /* DOE Error */
#define PCI_DOE_STATUS_DATA_OBJECT_READY 0x80000000 /* Data Object Ready */
#define PCI_DOE_WRITE 0x10 /* DOE Write Data Mailbox Register */
#define PCI_DOE_READ 0x14 /* DOE Read Data Mailbox Register */
/* DOE Data Object - note not actually registers */
#define PCI_DOE_DATA_OBJECT_HEADER_1_VID 0x0000ffff
#define PCI_DOE_DATA_OBJECT_HEADER_1_TYPE 0x00ff0000
#define PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH 0x0003ffff
#define PCI_DOE_DATA_OBJECT_DISC_REQ_3_INDEX 0x000000ff
#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_VID 0x0000ffff
#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL 0x00ff0000
#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_NEXT_INDEX 0xff000000
#endif /* LINUX_PCI_REGS_H */

17
include/standard-headers/linux/vhost_types.h
View File

@ -87,7 +87,7 @@ struct vhost_msg {
struct vhost_msg_v2 {
uint32_t type;
uint32_t reserved;
uint32_t asid;
union {
struct vhost_iotlb_msg iotlb;
uint8_t padding[64];
@ -107,7 +107,7 @@ struct vhost_memory_region {
struct vhost_memory {
uint32_t nregions;
uint32_t padding;
struct vhost_memory_region regions[0];
struct vhost_memory_region regions[];
};
/* VHOST_SCSI specific definitions */
@ -135,7 +135,7 @@ struct vhost_scsi_target {
struct vhost_vdpa_config {
uint32_t off;
uint32_t len;
uint8_t buf[0];
uint8_t buf[];
};
/* vhost vdpa IOVA range
@ -153,4 +153,15 @@ struct vhost_vdpa_iova_range {
/* vhost-net should add virtio_net_hdr for RX, and strip for TX packets. */
#define VHOST_NET_F_VIRTIO_NET_HDR 27
/* Use message type V2 */
#define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1
/* IOTLB can accept batching hints */
#define VHOST_BACKEND_F_IOTLB_BATCH 0x2
/* IOTLB can accept address space identifier through V2 type of IOTLB
* message
*/
#define VHOST_BACKEND_F_IOTLB_ASID 0x3
/* Device can be suspended */
#define VHOST_BACKEND_F_SUSPEND 0x4
#endif

2
include/standard-headers/linux/virtio_9p.h
View File

@ -38,7 +38,7 @@ struct virtio_9p_config {
/* length of the tag name */
__virtio16 tag_len;
/* non-NULL terminated tag name */
uint8_t tag[0];
uint8_t tag[];
} QEMU_PACKED;
#endif /* _LINUX_VIRTIO_9P_H */

7
include/standard-headers/linux/virtio_config.h
View File

@ -52,7 +52,7 @@
* rest are per-device feature bits.
*/
#define VIRTIO_TRANSPORT_F_START 28
#define VIRTIO_TRANSPORT_F_END 38
#define VIRTIO_TRANSPORT_F_END 41
#ifndef VIRTIO_CONFIG_NO_LEGACY
/* Do we get callbacks when the ring is completely used, even if we've
@ -96,4 +96,9 @@
* Does the device support Single Root I/O Virtualization?
*/
#define VIRTIO_F_SR_IOV 37
/*
* This feature indicates that the driver can reset a queue individually.
*/
#define VIRTIO_F_RING_RESET 40
#endif /* _LINUX_VIRTIO_CONFIG_H */

14
include/standard-headers/linux/virtio_ids.h
View File

@ -73,12 +73,12 @@
* Virtio Transitional IDs
*/
#define VIRTIO_TRANS_ID_NET 1000 /* transitional virtio net */
#define VIRTIO_TRANS_ID_BLOCK 1001 /* transitional virtio block */
#define VIRTIO_TRANS_ID_BALLOON 1002 /* transitional virtio balloon */
#define VIRTIO_TRANS_ID_CONSOLE 1003 /* transitional virtio console */
#define VIRTIO_TRANS_ID_SCSI 1004 /* transitional virtio SCSI */
#define VIRTIO_TRANS_ID_RNG 1005 /* transitional virtio rng */
#define VIRTIO_TRANS_ID_9P 1009 /* transitional virtio 9p console */
#define VIRTIO_TRANS_ID_NET 0x1000 /* transitional virtio net */
#define VIRTIO_TRANS_ID_BLOCK 0x1001 /* transitional virtio block */
#define VIRTIO_TRANS_ID_BALLOON 0x1002 /* transitional virtio balloon */
#define VIRTIO_TRANS_ID_CONSOLE 0x1003 /* transitional virtio console */
#define VIRTIO_TRANS_ID_SCSI 0x1004 /* transitional virtio SCSI */
#define VIRTIO_TRANS_ID_RNG 0x1005 /* transitional virtio rng */
#define VIRTIO_TRANS_ID_9P 0x1009 /* transitional virtio 9p console */
#endif /* _LINUX_VIRTIO_IDS_H */

34
include/standard-headers/linux/virtio_net.h
View File

@ -56,7 +56,7 @@
#define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow
* Steering */
#define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */
#define VIRTIO_NET_F_NOTF_COAL 53 /* Device supports notifications coalescing */
#define VIRTIO_NET_F_HASH_REPORT 57 /* Supports hash report */
#define VIRTIO_NET_F_RSS 60 /* Supports RSS RX steering */
#define VIRTIO_NET_F_RSC_EXT 61 /* extended coalescing info */
@ -355,4 +355,36 @@ struct virtio_net_hash_config {
#define VIRTIO_NET_CTRL_GUEST_OFFLOADS 5
#define VIRTIO_NET_CTRL_GUEST_OFFLOADS_SET 0
/*
* Control notifications coalescing.
*
* Request the device to change the notifications coalescing parameters.
*
* Available with the VIRTIO_NET_F_NOTF_COAL feature bit.
*/
#define VIRTIO_NET_CTRL_NOTF_COAL 6
/*
* Set the tx-usecs/tx-max-packets parameters.
*/
struct virtio_net_ctrl_coal_tx {
/* Maximum number of packets to send before a TX notification */
uint32_t tx_max_packets;
/* Maximum number of usecs to delay a TX notification */
uint32_t tx_usecs;
};
#define VIRTIO_NET_CTRL_NOTF_COAL_TX_SET 0
/*
* Set the rx-usecs/rx-max-packets parameters.
*/
struct virtio_net_ctrl_coal_rx {
/* Maximum number of packets to receive before a RX notification */
uint32_t rx_max_packets;
/* Maximum number of usecs to delay a RX notification */
uint32_t rx_usecs;
};
#define VIRTIO_NET_CTRL_NOTF_COAL_RX_SET 1
#endif /* _LINUX_VIRTIO_NET_H */

2
include/standard-headers/linux/virtio_pci.h
View File

@ -202,6 +202,8 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_PCI_COMMON_Q_AVAILHI 44
#define VIRTIO_PCI_COMMON_Q_USEDLO 48
#define VIRTIO_PCI_COMMON_Q_USEDHI 52
#define VIRTIO_PCI_COMMON_Q_NDATA 56
#define VIRTIO_PCI_COMMON_Q_RESET 58
#endif /* VIRTIO_PCI_NO_MODERN */

16
include/standard-headers/linux/virtio_ring.h
View File

@ -91,15 +91,21 @@
#define VRING_USED_ALIGN_SIZE 4
#define VRING_DESC_ALIGN_SIZE 16
/* Virtio ring descriptors: 16 bytes. These can chain together via "next". */
/**
* struct vring_desc - Virtio ring descriptors,
* 16 bytes long. These can chain together via @next.
*
* @addr: buffer address (guest-physical)
* @len: buffer length
* @flags: descriptor flags
* @next: index of the next descriptor in the chain,
* if the VRING_DESC_F_NEXT flag is set. We chain unused
* descriptors via this, too.
*/
struct vring_desc {
/* Address (guest-physical). */
__virtio64 addr;
/* Length. */
__virtio32 len;
/* The flags as indicated above. */
__virtio16 flags;
/* We chain unused descriptors via this, too */
__virtio16 next;
};

33
linux-headers/asm-arm64/kvm.h
View File

@ -75,9 +75,11 @@ struct kvm_regs {
/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
#define KVM_ARM_DEVICE_TYPE_SHIFT 0
#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT)
#define KVM_ARM_DEVICE_TYPE_MASK GENMASK(KVM_ARM_DEVICE_TYPE_SHIFT + 15, \
KVM_ARM_DEVICE_TYPE_SHIFT)
#define KVM_ARM_DEVICE_ID_SHIFT 16
#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT)
#define KVM_ARM_DEVICE_ID_MASK GENMASK(KVM_ARM_DEVICE_ID_SHIFT + 15, \
KVM_ARM_DEVICE_ID_SHIFT)
/* Supported device IDs */
#define KVM_ARM_DEVICE_VGIC_V2 0
@ -139,8 +141,10 @@ struct kvm_guest_debug_arch {
__u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS];
};
#define KVM_DEBUG_ARCH_HSR_HIGH_VALID (1 << 0)
struct kvm_debug_exit_arch {
__u32 hsr;
__u32 hsr_high; /* ESR_EL2[61:32] */
__u64 far; /* used for watchpoints */
};
@ -332,6 +336,31 @@ struct kvm_arm_copy_mte_tags {
#define KVM_ARM64_SVE_VLS_WORDS \
((KVM_ARM64_SVE_VQ_MAX - KVM_ARM64_SVE_VQ_MIN) / 64 + 1)
/* Bitmap feature firmware registers */
#define KVM_REG_ARM_FW_FEAT_BMAP (0x0016 << KVM_REG_ARM_COPROC_SHIFT)
#define KVM_REG_ARM_FW_FEAT_BMAP_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
KVM_REG_ARM_FW_FEAT_BMAP | \
((r) & 0xffff))
#define KVM_REG_ARM_STD_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(0)
enum {
KVM_REG_ARM_STD_BIT_TRNG_V1_0 = 0,
};
#define KVM_REG_ARM_STD_HYP_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(1)
enum {
KVM_REG_ARM_STD_HYP_BIT_PV_TIME = 0,
};
#define KVM_REG_ARM_VENDOR_HYP_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(2)
enum {
KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT = 0,
KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1,
};
/* Device Control API: ARM VGIC */
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1

4
linux-headers/asm-generic/unistd.h
View File

@ -383,7 +383,7 @@ __SYSCALL(__NR_syslog, sys_syslog)
/* kernel/ptrace.c */
#define __NR_ptrace 117
__SYSCALL(__NR_ptrace, sys_ptrace)
__SC_COMP(__NR_ptrace, sys_ptrace, compat_sys_ptrace)
/* kernel/sched/core.c */
#define __NR_sched_setparam 118
@ -779,7 +779,7 @@ __SYSCALL(__NR_rseq, sys_rseq)
#define __NR_kexec_file_load 294
__SYSCALL(__NR_kexec_file_load, sys_kexec_file_load)
/* 295 through 402 are unassigned to sync up with generic numbers, don't use */
#if __BITS_PER_LONG == 32
#if defined(__SYSCALL_COMPAT) || __BITS_PER_LONG == 32
#define __NR_clock_gettime64 403
__SYSCALL(__NR_clock_gettime64, sys_clock_gettime)
#define __NR_clock_settime64 404

22
linux-headers/asm-riscv/kvm.h
View File

@ -82,6 +82,25 @@ struct kvm_riscv_timer {
__u64 state;
};
/*
* ISA extension IDs specific to KVM. This is not the same as the host ISA
* extension IDs as that is internal to the host and should not be exposed
* to the guest. This should always be contiguous to keep the mapping simple
* in KVM implementation.
*/
enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_A = 0,
KVM_RISCV_ISA_EXT_C,
KVM_RISCV_ISA_EXT_D,
KVM_RISCV_ISA_EXT_F,
KVM_RISCV_ISA_EXT_H,
KVM_RISCV_ISA_EXT_I,
KVM_RISCV_ISA_EXT_M,
KVM_RISCV_ISA_EXT_SVPBMT,
KVM_RISCV_ISA_EXT_SSTC,
KVM_RISCV_ISA_EXT_MAX,
};
/* Possible states for kvm_riscv_timer */
#define KVM_RISCV_TIMER_STATE_OFF 0
#define KVM_RISCV_TIMER_STATE_ON 1
@ -123,6 +142,9 @@ struct kvm_riscv_timer {
#define KVM_REG_RISCV_FP_D_REG(name) \
(offsetof(struct __riscv_d_ext_state, name) / sizeof(__u64))
/* ISA Extension registers are mapped as type 7 */
#define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT)
#endif
#endif /* __LINUX_KVM_RISCV_H */

3
linux-headers/asm-riscv/unistd.h
View File

@ -15,12 +15,13 @@
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
#ifdef __LP64__
#if defined(__LP64__) && !defined(__SYSCALL_COMPAT)
#define __ARCH_WANT_NEW_STAT
#define __ARCH_WANT_SET_GET_RLIMIT
#endif /* __LP64__ */
#define __ARCH_WANT_SYS_CLONE3
#define __ARCH_WANT_MEMFD_SECRET
#include <asm-generic/unistd.h>

1
linux-headers/asm-s390/kvm.h
View File

@ -74,6 +74,7 @@ struct kvm_s390_io_adapter_req {
#define KVM_S390_VM_CRYPTO 2
#define KVM_S390_VM_CPU_MODEL 3
#define KVM_S390_VM_MIGRATION 4
#define KVM_S390_VM_CPU_TOPOLOGY 5
/* kvm attributes for mem_ctrl */
#define KVM_S390_VM_MEM_ENABLE_CMMA 0

33
linux-headers/asm-x86/kvm.h
View File

@ -198,13 +198,13 @@ struct kvm_msrs {
__u32 nmsrs; /* number of msrs in entries */
__u32 pad;
struct kvm_msr_entry entries[0];
struct kvm_msr_entry entries[];
};
/* for KVM_GET_MSR_INDEX_LIST */
struct kvm_msr_list {
__u32 nmsrs; /* number of msrs in entries */
__u32 indices[0];
__u32 indices[];
};
/* Maximum size of any access bitmap in bytes */
@ -241,7 +241,7 @@ struct kvm_cpuid_entry {
struct kvm_cpuid {
__u32 nent;
__u32 padding;
struct kvm_cpuid_entry entries[0];
struct kvm_cpuid_entry entries[];
};
struct kvm_cpuid_entry2 {
@ -263,7 +263,7 @@ struct kvm_cpuid_entry2 {
struct kvm_cpuid2 {
__u32 nent;
__u32 padding;
struct kvm_cpuid_entry2 entries[0];
struct kvm_cpuid_entry2 entries[];
};
/* for KVM_GET_PIT and KVM_SET_PIT */
@ -306,7 +306,8 @@ struct kvm_pit_state {
struct kvm_pit_channel_state channels[3];
};
#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
#define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
struct kvm_pit_state2 {
struct kvm_pit_channel_state channels[3];
@ -325,6 +326,7 @@ struct kvm_reinject_control {
#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
#define KVM_VCPUEVENT_VALID_SMM 0x00000008
#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
#define KVM_VCPUEVENT_VALID_TRIPLE_FAULT 0x00000020
/* Interrupt shadow states */
#define KVM_X86_SHADOW_INT_MOV_SS 0x01
@ -359,7 +361,10 @@ struct kvm_vcpu_events {
__u8 smm_inside_nmi;
__u8 latched_init;
} smi;
__u8 reserved[27];
struct {
__u8 pending;
} triple_fault;
__u8 reserved[26];
__u8 exception_has_payload;
__u64 exception_payload;
};
@ -389,7 +394,7 @@ struct kvm_xsave {
* the contents of CPUID leaf 0xD on the host.
*/
__u32 region[1024];
__u32 extra[0];
__u32 extra[];
};
#define KVM_MAX_XCRS 16
@ -428,11 +433,13 @@ struct kvm_sync_regs {
struct kvm_vcpu_events events;
};
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
#define KVM_X86_QUIRK_FIX_HYPERCALL_INSN (1 << 5)
#define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS (1 << 6)
#define KVM_STATE_NESTED_FORMAT_VMX 0
#define KVM_STATE_NESTED_FORMAT_SVM 1
@ -515,7 +522,7 @@ struct kvm_pmu_event_filter {
__u32 fixed_counter_bitmap;
__u32 flags;
__u32 pad[4];
__u64 events[0];
__u64 events[];
};
#define KVM_PMU_EVENT_ALLOW 0

14
linux-headers/asm-x86/mman.h
View File

@ -5,20 +5,6 @@
#define MAP_32BIT 0x40 /* only give out 32bit addresses */
#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
/*
* Take the 4 protection key bits out of the vma->vm_flags
* value and turn them in to the bits that we can put in
* to a pte.
*
* Only override these if Protection Keys are available
* (which is only on 64-bit).
*/
#define arch_vm_get_page_prot(vm_flags) __pgprot( \
((vm_flags) & VM_PKEY_BIT0 ? _PAGE_PKEY_BIT0 : 0) | \
((vm_flags) & VM_PKEY_BIT1 ? _PAGE_PKEY_BIT1 : 0) | \
((vm_flags) & VM_PKEY_BIT2 ? _PAGE_PKEY_BIT2 : 0) | \
((vm_flags) & VM_PKEY_BIT3 ? _PAGE_PKEY_BIT3 : 0))
#define arch_calc_vm_prot_bits(prot, key) ( \
((key) & 0x1 ? VM_PKEY_BIT0 : 0) | \
((key) & 0x2 ? VM_PKEY_BIT1 : 0) | \

172
linux-headers/linux/kvm.h
View File

@ -270,6 +270,8 @@ struct kvm_xen_exit {
#define KVM_EXIT_X86_BUS_LOCK 33
#define KVM_EXIT_XEN 34
#define KVM_EXIT_RISCV_SBI 35
#define KVM_EXIT_RISCV_CSR 36
#define KVM_EXIT_NOTIFY 37
/* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */
@ -444,6 +446,9 @@ struct kvm_run {
#define KVM_SYSTEM_EVENT_SHUTDOWN 1
#define KVM_SYSTEM_EVENT_RESET 2
#define KVM_SYSTEM_EVENT_CRASH 3
#define KVM_SYSTEM_EVENT_WAKEUP 4
#define KVM_SYSTEM_EVENT_SUSPEND 5
#define KVM_SYSTEM_EVENT_SEV_TERM 6
__u32 type;
__u32 ndata;
union {
@ -491,6 +496,18 @@ struct kvm_run {
unsigned long args[6];
unsigned long ret[2];
} riscv_sbi;
/* KVM_EXIT_RISCV_CSR */
struct {
unsigned long csr_num;
unsigned long new_value;
unsigned long write_mask;
unsigned long ret_value;
} riscv_csr;
/* KVM_EXIT_NOTIFY */
struct {
#define KVM_NOTIFY_CONTEXT_INVALID (1 << 0)
__u32 flags;
} notify;
/* Fix the size of the union. */
char padding[256];
};
@ -537,7 +554,7 @@ struct kvm_coalesced_mmio {
struct kvm_coalesced_mmio_ring {
__u32 first, last;
struct kvm_coalesced_mmio coalesced_mmio[0];
struct kvm_coalesced_mmio coalesced_mmio[];
};
#define KVM_COALESCED_MMIO_MAX \
@ -616,7 +633,7 @@ struct kvm_clear_dirty_log {
/* for KVM_SET_SIGNAL_MASK */
struct kvm_signal_mask {
__u32 len;
__u8 sigset[0];
__u8 sigset[];
};
/* for KVM_TPR_ACCESS_REPORTING */
@ -644,6 +661,7 @@ struct kvm_vapic_addr {
#define KVM_MP_STATE_OPERATING 7
#define KVM_MP_STATE_LOAD 8
#define KVM_MP_STATE_AP_RESET_HOLD 9
#define KVM_MP_STATE_SUSPENDED 10
struct kvm_mp_state {
__u32 mp_state;
@ -1148,8 +1166,15 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_S390_MEM_OP_EXTENSION 211
#define KVM_CAP_PMU_CAPABILITY 212
#define KVM_CAP_DISABLE_QUIRKS2 213
/* #define KVM_CAP_VM_TSC_CONTROL 214 */
#define KVM_CAP_VM_TSC_CONTROL 214
#define KVM_CAP_SYSTEM_EVENT_DATA 215
#define KVM_CAP_ARM_SYSTEM_SUSPEND 216
#define KVM_CAP_S390_PROTECTED_DUMP 217
#define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218
#define KVM_CAP_X86_NOTIFY_VMEXIT 219
#define KVM_CAP_VM_DISABLE_NX_HUGE_PAGES 220
#define KVM_CAP_S390_ZPCI_OP 221
#define KVM_CAP_S390_CPU_TOPOLOGY 222
#ifdef KVM_CAP_IRQ_ROUTING
@ -1214,7 +1239,7 @@ struct kvm_irq_routing_entry {
struct kvm_irq_routing {
__u32 nr;
__u32 flags;
struct kvm_irq_routing_entry entries[0];
struct kvm_irq_routing_entry entries[];
};
#endif
@ -1238,6 +1263,7 @@ struct kvm_x86_mce {
#define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2)
#define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3)
#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4)
#define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5)
struct kvm_xen_hvm_config {
__u32 flags;
@ -1333,7 +1359,7 @@ struct kvm_dirty_tlb {
struct kvm_reg_list {
__u64 n; /* number of regs */
__u64 reg[0];
__u64 reg[];
};
struct kvm_one_reg {
@ -1476,7 +1502,8 @@ struct kvm_s390_ucas_mapping {
#define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2)
/* Available with KVM_CAP_PPC_GET_PVINFO */
#define KVM_PPC_GET_PVINFO _IOW(KVMIO, 0xa1, struct kvm_ppc_pvinfo)
/* Available with KVM_CAP_TSC_CONTROL */
/* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with
* KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */
#define KVM_SET_TSC_KHZ _IO(KVMIO, 0xa2)
#define KVM_GET_TSC_KHZ _IO(KVMIO, 0xa3)
/* Available with KVM_CAP_PCI_2_3 */
@ -1651,6 +1678,55 @@ struct kvm_s390_pv_unp {
__u64 tweak;
};
enum pv_cmd_dmp_id {
KVM_PV_DUMP_INIT,
KVM_PV_DUMP_CONFIG_STOR_STATE,
KVM_PV_DUMP_COMPLETE,
KVM_PV_DUMP_CPU,
};
struct kvm_s390_pv_dmp {
__u64 subcmd;
__u64 buff_addr;
__u64 buff_len;
__u64 gaddr; /* For dump storage state */
__u64 reserved[4];
};
enum pv_cmd_info_id {
KVM_PV_INFO_VM,
KVM_PV_INFO_DUMP,
};
struct kvm_s390_pv_info_dump {
__u64 dump_cpu_buffer_len;
__u64 dump_config_mem_buffer_per_1m;
__u64 dump_config_finalize_len;
};
struct kvm_s390_pv_info_vm {
__u64 inst_calls_list[4];
__u64 max_cpus;
__u64 max_guests;
__u64 max_guest_addr;
__u64 feature_indication;
};
struct kvm_s390_pv_info_header {
__u32 id;
__u32 len_max;
__u32 len_written;
__u32 reserved;
};
struct kvm_s390_pv_info {
struct kvm_s390_pv_info_header header;
union {
struct kvm_s390_pv_info_dump dump;
struct kvm_s390_pv_info_vm vm;
};
};
enum pv_cmd_id {
KVM_PV_ENABLE,
KVM_PV_DISABLE,
@ -1659,6 +1735,8 @@ enum pv_cmd_id {
KVM_PV_VERIFY,
KVM_PV_PREP_RESET,
KVM_PV_UNSHARE_ALL,
KVM_PV_INFO,
KVM_PV_DUMP,
};
struct kvm_pv_cmd {
@ -1692,6 +1770,32 @@ struct kvm_xen_hvm_attr {
struct {
__u64 gfn;
} shared_info;
struct {
__u32 send_port;
__u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */
__u32 flags;
#define KVM_XEN_EVTCHN_DEASSIGN (1 << 0)
#define KVM_XEN_EVTCHN_UPDATE (1 << 1)
#define KVM_XEN_EVTCHN_RESET (1 << 2)
/*
* Events sent by the guest are either looped back to
* the guest itself (potentially on a different port#)
* or signalled via an eventfd.
*/
union {
struct {
__u32 port;
__u32 vcpu;
__u32 priority;
} port;
struct {
__u32 port; /* Zero for eventfd */
__s32 fd;
} eventfd;
__u32 padding[4];
} deliver;
} evtchn;
__u32 xen_version;
__u64 pad[8];
} u;
};
@ -1700,11 +1804,17 @@ struct kvm_xen_hvm_attr {
#define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0
#define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1
#define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2
/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
#define KVM_XEN_ATTR_TYPE_EVTCHN 0x3
#define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4
/* Per-vCPU Xen attributes */
#define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr)
#define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr)
/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
#define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn)
#define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2)
#define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2)
@ -1722,6 +1832,13 @@ struct kvm_xen_vcpu_attr {
__u64 time_blocked;
__u64 time_offline;
} runstate;
__u32 vcpu_id;
struct {
__u32 port;
__u32 priority;
__u64 expires_ns;
} timer;
__u8 vector;
} u;
};
@ -1732,6 +1849,10 @@ struct kvm_xen_vcpu_attr {
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5
/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6
#define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7
#define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8
/* Secure Encrypted Virtualization command */
enum sev_cmd_id {
@ -2032,7 +2153,7 @@ struct kvm_stats_header {
#define KVM_STATS_UNIT_SECONDS (0x2 << KVM_STATS_UNIT_SHIFT)
#define KVM_STATS_UNIT_CYCLES (0x3 << KVM_STATS_UNIT_SHIFT)
#define KVM_STATS_UNIT_BOOLEAN (0x4 << KVM_STATS_UNIT_SHIFT)
#define KVM_STATS_UNIT_MAX KVM_STATS_UNIT_CYCLES
#define KVM_STATS_UNIT_MAX KVM_STATS_UNIT_BOOLEAN
#define KVM_STATS_BASE_SHIFT 8
#define KVM_STATS_BASE_MASK (0xF << KVM_STATS_BASE_SHIFT)
@ -2067,4 +2188,41 @@ struct kvm_stats_desc {
/* Available with KVM_CAP_XSAVE2 */
#define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave)
/* Available with KVM_CAP_S390_PROTECTED_DUMP */
#define KVM_S390_PV_CPU_COMMAND _IOWR(KVMIO, 0xd0, struct kvm_pv_cmd)
/* Available with KVM_CAP_X86_NOTIFY_VMEXIT */
#define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0)
#define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1)
/* Available with KVM_CAP_S390_ZPCI_OP */
#define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op)
struct kvm_s390_zpci_op {
/* in */
__u32 fh; /* target device */
__u8 op; /* operation to perform */
__u8 pad[3];
union {
/* for KVM_S390_ZPCIOP_REG_AEN */
struct {
__u64 ibv; /* Guest addr of interrupt bit vector */
__u64 sb; /* Guest addr of summary bit */
__u32 flags;
__u32 noi; /* Number of interrupts */
__u8 isc; /* Guest interrupt subclass */
__u8 sbo; /* Offset of guest summary bit vector */
__u16 pad;
} reg_aen;
__u64 reserved[8];
} u;
};
/* types for kvm_s390_zpci_op->op */
#define KVM_S390_ZPCIOP_REG_AEN 0
#define KVM_S390_ZPCIOP_DEREG_AEN 1
/* flags for kvm_s390_zpci_op->u.reg_aen.flags */
#define KVM_S390_ZPCIOP_REGAEN_HOST (1 << 0)
#endif /* __LINUX_KVM_H */

10
linux-headers/linux/userfaultfd.h
View File

@ -33,7 +33,8 @@
UFFD_FEATURE_THREAD_ID | \
UFFD_FEATURE_MINOR_HUGETLBFS | \
UFFD_FEATURE_MINOR_SHMEM | \
UFFD_FEATURE_EXACT_ADDRESS)
UFFD_FEATURE_EXACT_ADDRESS | \
UFFD_FEATURE_WP_HUGETLBFS_SHMEM)
#define UFFD_API_IOCTLS \
((__u64)1 << _UFFDIO_REGISTER | \
(__u64)1 << _UFFDIO_UNREGISTER | \
@ -47,7 +48,8 @@
#define UFFD_API_RANGE_IOCTLS_BASIC \
((__u64)1 << _UFFDIO_WAKE | \
(__u64)1 << _UFFDIO_COPY | \
(__u64)1 << _UFFDIO_CONTINUE)
(__u64)1 << _UFFDIO_CONTINUE | \
(__u64)1 << _UFFDIO_WRITEPROTECT)
/*
* Valid ioctl command number range with this API is from 0x00 to
@ -194,6 +196,9 @@ struct uffdio_api {
* UFFD_FEATURE_EXACT_ADDRESS indicates that the exact address of page
* faults would be provided and the offset within the page would not be
* masked.
*
* UFFD_FEATURE_WP_HUGETLBFS_SHMEM indicates that userfaultfd
* write-protection mode is supported on both shmem and hugetlbfs.
*/
#define UFFD_FEATURE_PAGEFAULT_FLAG_WP (1<<0)
#define UFFD_FEATURE_EVENT_FORK (1<<1)
@ -207,6 +212,7 @@ struct uffdio_api {
#define UFFD_FEATURE_MINOR_HUGETLBFS (1<<9)
#define UFFD_FEATURE_MINOR_SHMEM (1<<10)
#define UFFD_FEATURE_EXACT_ADDRESS (1<<11)
#define UFFD_FEATURE_WP_HUGETLBFS_SHMEM (1<<12)
__u64 features;
__u64 ioctls;

47
linux-headers/linux/vduse.h
View File

@ -210,6 +210,53 @@ struct vduse_vq_eventfd {
*/
#define VDUSE_VQ_INJECT_IRQ _IOW(VDUSE_BASE, 0x17, __u32)
/**
* struct vduse_iova_umem - userspace memory configuration for one IOVA region
* @uaddr: start address of userspace memory, it must be aligned to page size
* @iova: start of the IOVA region
* @size: size of the IOVA region
* @reserved: for future use, needs to be initialized to zero
*
* Structure used by VDUSE_IOTLB_REG_UMEM and VDUSE_IOTLB_DEREG_UMEM
* ioctls to register/de-register userspace memory for IOVA regions
*/
struct vduse_iova_umem {
__u64 uaddr;
__u64 iova;
__u64 size;
__u64 reserved[3];
};
/* Register userspace memory for IOVA regions */
#define VDUSE_IOTLB_REG_UMEM _IOW(VDUSE_BASE, 0x18, struct vduse_iova_umem)
/* De-register the userspace memory. Caller should set iova and size field. */
#define VDUSE_IOTLB_DEREG_UMEM _IOW(VDUSE_BASE, 0x19, struct vduse_iova_umem)
/**
* struct vduse_iova_info - information of one IOVA region
* @start: start of the IOVA region
* @last: last of the IOVA region
* @capability: capability of the IOVA regsion
* @reserved: for future use, needs to be initialized to zero
*
* Structure used by VDUSE_IOTLB_GET_INFO ioctl to get information of
* one IOVA region.
*/
struct vduse_iova_info {
__u64 start;
__u64 last;
#define VDUSE_IOVA_CAP_UMEM (1 << 0)
__u64 capability;
__u64 reserved[3];
};
/*
* Find the first IOVA region that overlaps with the range [start, last]
* and return some information on it. Caller should set start and last fields.
*/
#define VDUSE_IOTLB_GET_INFO _IOWR(VDUSE_BASE, 0x1a, struct vduse_iova_info)
/* The control messages definition for read(2)/write(2) on /dev/vduse/$NAME */
/**

4
linux-headers/linux/vfio.h
View File

@ -643,7 +643,7 @@ enum {
};
/**
* VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
* VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 12,
* struct vfio_pci_hot_reset_info)
*
* Return: 0 on success, -errno on failure:
@ -770,7 +770,7 @@ struct vfio_device_ioeventfd {
#define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16)
/**
* VFIO_DEVICE_FEATURE - _IORW(VFIO_TYPE, VFIO_BASE + 17,
* VFIO_DEVICE_FEATURE - _IOWR(VFIO_TYPE, VFIO_BASE + 17,
* struct vfio_device_feature)
*
* Get, set, or probe feature data of the device. The feature is selected

7
linux-headers/linux/vfio_zdev.h
View File

@ -29,6 +29,9 @@ struct vfio_device_info_cap_zpci_base {
__u16 fmb_length; /* Measurement Block Length (in bytes) */
__u8 pft; /* PCI Function Type */
__u8 gid; /* PCI function group ID */
/* End of version 1 */
__u32 fh; /* PCI function handle */
/* End of version 2 */
};
/**
@ -47,6 +50,10 @@ struct vfio_device_info_cap_zpci_group {
__u16 noi; /* Maximum number of MSIs */
__u16 maxstbl; /* Maximum Store Block Length */
__u8 version; /* Supported PCI Version */
/* End of version 1 */
__u8 reserved;
__u16 imaxstbl; /* Maximum Interpreted Store Block Length */
/* End of version 2 */
};
/**

35
linux-headers/linux/vhost.h
View File

@ -89,11 +89,6 @@
/* Set or get vhost backend capability */
/* Use message type V2 */
#define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1
/* IOTLB can accept batching hints */
#define VHOST_BACKEND_F_IOTLB_BATCH 0x2
#define VHOST_SET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x25, __u64)
#define VHOST_GET_BACKEND_FEATURES _IOR(VHOST_VIRTIO, 0x26, __u64)
@ -150,11 +145,39 @@
/* Get the valid iova range */
#define VHOST_VDPA_GET_IOVA_RANGE _IOR(VHOST_VIRTIO, 0x78, \
struct vhost_vdpa_iova_range)
/* Get the config size */
#define VHOST_VDPA_GET_CONFIG_SIZE _IOR(VHOST_VIRTIO, 0x79, __u32)
/* Get the count of all virtqueues */
#define VHOST_VDPA_GET_VQS_COUNT _IOR(VHOST_VIRTIO, 0x80, __u32)
/* Get the number of virtqueue groups. */
#define VHOST_VDPA_GET_GROUP_NUM _IOR(VHOST_VIRTIO, 0x81, __u32)
/* Get the number of address spaces. */
#define VHOST_VDPA_GET_AS_NUM _IOR(VHOST_VIRTIO, 0x7A, unsigned int)
/* Get the group for a virtqueue: read index, write group in num,
* The virtqueue index is stored in the index field of
* vhost_vring_state. The group for this specific virtqueue is
* returned via num field of vhost_vring_state.
*/
#define VHOST_VDPA_GET_VRING_GROUP _IOWR(VHOST_VIRTIO, 0x7B, \
struct vhost_vring_state)
/* Set the ASID for a virtqueue group. The group index is stored in
* the index field of vhost_vring_state, the ASID associated with this
* group is stored at num field of vhost_vring_state.
*/
#define VHOST_VDPA_SET_GROUP_ASID _IOW(VHOST_VIRTIO, 0x7C, \
struct vhost_vring_state)
/* Suspend a device so it does not process virtqueue requests anymore
*
* After the return of ioctl the device must preserve all the necessary state
* (the virtqueue vring base plus the possible device specific states) that is
* required for restoring in the future. The device must not change its
* configuration after that point.
*/
#define VHOST_VDPA_SUSPEND _IO(VHOST_VIRTIO, 0x7D)
#endif

25
linux-user/include/host/s390/host-signal.h
View File

@ -87,6 +87,31 @@ static inline bool host_signal_write(siginfo_t *info, host_sigcontext *uc)
return true;
}
break;
case 0xe6:
switch (pinsn[2] & 0xff) {
case 0x09: /* VSTEBRH */
case 0x0a: /* VSTEBRG */
case 0x0b: /* VSTEBRF */
case 0x0e: /* VSTBR */
case 0x0f: /* VSTER */
case 0x3f: /* VSTRLR */
return true;
}
break;
case 0xe7:
switch (pinsn[2] & 0xff) {
case 0x08: /* VSTEB */
case 0x09: /* VSTEH */
case 0x0a: /* VSTEG */
case 0x0b: /* VSTEF */
case 0x0e: /* VST */
case 0x1a: /* VSCEG */
case 0x1b: /* VSCEF */
case 0x3e: /* VSTM */
case 0x3f: /* VSTL */
return true;
}
break;
case 0xeb: /* RSY format insns */
switch (pinsn[2] & 0xff) {
case 0x14: /* CSY */

121
meson.build
View File

@ -637,6 +637,26 @@ else
method: 'pkg-config', kwargs: static_kwargs)
endif
slirp = not_found
if not get_option('slirp').auto() or have_system
slirp = dependency('slirp', required: get_option('slirp'),
method: 'pkg-config', kwargs: static_kwargs)
# slirp < 4.7 is incompatible with CFI support in QEMU. This is because
# it passes function pointers within libslirp as callbacks for timers.
# When using a system-wide shared libslirp, the type information for the
# callback is missing and the timer call produces a false positive with CFI.
# Do not use the "version" keyword argument to produce a better error.
# with control-flow integrity.
if get_option('cfi') and slirp.found() and slirp.version().version_compare('<4.7')
if get_option('slirp').enabled()
error('Control-Flow Integrity requires libslirp 4.7.')
else
warning('Cannot use libslirp since Control-Flow Integrity requires libslirp >= 4.7.')
slirp = not_found
endif
endif
endif
vde = not_found
if not get_option('vde').auto() or have_system or have_tools
vde = cc.find_library('vdeplug', has_headers: ['libvdeplug.h'],
@ -2617,103 +2637,6 @@ if not get_option('capstone').auto() or have_system or have_user
endif
endif
slirp = not_found
slirp_opt = 'disabled'
if have_system
slirp_opt = get_option('slirp')
if slirp_opt in ['enabled', 'auto', 'system']
have_internal = fs.exists(meson.current_source_dir() / 'slirp/meson.build')
slirp_dep_required = (slirp_opt == 'system' or
slirp_opt == 'enabled' and not have_internal)
slirp = dependency('slirp', kwargs: static_kwargs,
method: 'pkg-config', version: '>=4.1.0',
required: slirp_dep_required)
# slirp <4.7 is incompatible with CFI support in QEMU. This is because
# it passes function pointers within libslirp as callbacks for timers.
# When using a system-wide shared libslirp, the type information for the
# callback is missing and the timer call produces a false positive with CFI.
# Do not use the "version" keyword argument to produce a better error.
# with control-flow integrity.
if get_option('cfi') and slirp.found() and slirp.version().version_compare('<4.7')
if slirp_dep_required
error('Control-Flow Integrity requires libslirp 4.7.')
else
warning('Control-Flow Integrity requires libslirp 4.7, not using system-wide libslirp.')
slirp = not_found
endif
endif
if slirp.found()
slirp_opt = 'system'
elif have_internal
slirp_opt = 'internal'
else
slirp_opt = 'disabled'
endif
endif
if slirp_opt == 'internal'
slirp_deps = []
if targetos == 'windows'
slirp_deps = cc.find_library('iphlpapi')
elif targetos == 'darwin'
slirp_deps = cc.find_library('resolv')
endif
slirp_conf = configuration_data()
slirp_conf.set('SLIRP_MAJOR_VERSION', meson.project_version().split('.')[0])
slirp_conf.set('SLIRP_MINOR_VERSION', meson.project_version().split('.')[1])
slirp_conf.set('SLIRP_MICRO_VERSION', meson.project_version().split('.')[2])
slirp_conf.set_quoted('SLIRP_VERSION_STRING', meson.project_version())
slirp_cargs = ['-DG_LOG_DOMAIN="Slirp"']
slirp_files = [
'slirp/src/arp_table.c',
'slirp/src/bootp.c',
'slirp/src/cksum.c',
'slirp/src/dhcpv6.c',
'slirp/src/dnssearch.c',
'slirp/src/if.c',
'slirp/src/ip6_icmp.c',
'slirp/src/ip6_input.c',
'slirp/src/ip6_output.c',
'slirp/src/ip_icmp.c',
'slirp/src/ip_input.c',
'slirp/src/ip_output.c',
'slirp/src/mbuf.c',
'slirp/src/misc.c',
'slirp/src/ncsi.c',
'slirp/src/ndp_table.c',
'slirp/src/sbuf.c',
'slirp/src/slirp.c',
'slirp/src/socket.c',
'slirp/src/state.c',
'slirp/src/stream.c',
'slirp/src/tcp_input.c',
'slirp/src/tcp_output.c',
'slirp/src/tcp_subr.c',
'slirp/src/tcp_timer.c',
'slirp/src/tftp.c',
'slirp/src/udp.c',
'slirp/src/udp6.c',
'slirp/src/util.c',
'slirp/src/version.c',
'slirp/src/vmstate.c',
]
configure_file(
input : 'slirp/src/libslirp-version.h.in',
output : 'libslirp-version.h',
configuration: slirp_conf)
slirp_inc = include_directories('slirp', 'slirp/src')
libslirp = static_library('slirp',
build_by_default: false,
sources: slirp_files,
c_args: slirp_cargs,
include_directories: slirp_inc)
slirp = declare_dependency(link_with: libslirp,
dependencies: slirp_deps,
include_directories: slirp_inc)
endif
endif
libvfio_user_dep = not_found
if have_system and vfio_user_server_allowed
have_internal = fs.exists(meson.current_source_dir() / 'subprojects/libvfio-user/meson.build')
@ -3718,7 +3641,7 @@ summary_info += {'genisoimage': config_host['GENISOIMAGE']}
if targetos == 'windows' and have_ga
summary_info += {'wixl': wixl}
endif
if slirp_opt != 'disabled' and have_system
if slirp.found() and have_system
summary_info += {'smbd': have_slirp_smbd ? smbd_path : false}
endif
summary(summary_info, bool_yn: true, section: 'Host binaries')
@ -3912,7 +3835,7 @@ summary_info += {'SDL image support': sdl_image}
summary_info += {'GTK support': gtk}
summary_info += {'pixman': pixman}
summary_info += {'VTE support': vte}
summary_info += {'slirp support': slirp_opt == 'internal' ? slirp_opt : slirp}
summary_info += {'slirp support': slirp}
summary_info += {'libtasn1': tasn1}
summary_info += {'PAM': pam}
summary_info += {'iconv support': iconv}

5
meson_options.txt
View File

@ -199,6 +199,8 @@ option('l2tpv3', type : 'feature', value : 'auto',
description: 'l2tpv3 network backend support')
option('netmap', type : 'feature', value : 'auto',
description: 'netmap network backend support')
option('slirp', type: 'feature', value: 'auto',
description: 'libslirp user mode network backend support')
option('vde', type : 'feature', value : 'auto',
description: 'vde network backend support')
option('vmnet', type : 'feature', value : 'auto',
@ -266,9 +268,6 @@ option('vduse_blk_export', type: 'feature', value: 'auto',
option('capstone', type: 'feature', value: 'auto',
description: 'Whether and how to find the capstone library')
option('slirp', type: 'combo', value: 'auto',
choices: ['disabled', 'enabled', 'auto', 'system', 'internal'],
description: 'Whether and how to find the slirp library')
option('fdt', type: 'combo', value: 'auto',
choices: ['disabled', 'enabled', 'auto', 'system', 'internal'],
description: 'Whether and how to find the libfdt library')

8
qemu-options.hx
View File

@ -37,7 +37,8 @@ DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
" memory-encryption=@var{} memory encryption object to use (default=none)\n"
" hmat=on|off controls ACPI HMAT support (default=off)\n"
" memory-backend='backend-id' specifies explicitly provided backend for main RAM (default=none)\n"
" cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]\n",
" cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]\n"
" zpcii-disable=on|off disables zPCI interpretation facilities (default=off)\n",
QEMU_ARCH_ALL)
SRST
``-machine [type=]name[,prop=value[,...]]``
@ -157,6 +158,11 @@ SRST
::
-machine cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=128G,cxl-fmw.0.interleave-granularity=512k
``zpcii-disable=on|off``
Disables zPCI interpretation facilties on s390-ccw hosts.
This feature can be used to disable hardware virtual assists
related to zPCI devices. The default is off.
ERST
DEF("M", HAS_ARG, QEMU_OPTION_M,

2
scripts/archive-source.sh
View File

@ -26,7 +26,7 @@ sub_file="${sub_tdir}/submodule.tar"
# independent of what the developer currently has initialized
# in their checkout, because the build environment is completely
# different to the host OS.
submodules="dtc slirp meson ui/keycodemapdb"
submodules="dtc meson ui/keycodemapdb"
submodules="$submodules tests/fp/berkeley-softfloat-3 tests/fp/berkeley-testfloat-3"
sub_deinit=""

4
scripts/meson-buildoptions.sh
View File

@ -35,8 +35,6 @@ meson_options_help() {
printf "%s\n" ' --enable-qom-cast-debug cast debugging support'
printf "%s\n" ' --enable-rng-none dummy RNG, avoid using /dev/(u)random and'
printf "%s\n" ' getrandom()'
printf "%s\n" ' --enable-slirp[=CHOICE] Whether and how to find the slirp library'
printf "%s\n" ' (choices: auto/disabled/enabled/internal/system)'
printf "%s\n" ' --enable-strip Strip targets on install'
printf "%s\n" ' --enable-tcg-interpreter TCG with bytecode interpreter (slow)'
printf "%s\n" ' --enable-trace-backends=CHOICES'
@ -141,6 +139,7 @@ meson_options_help() {
printf "%s\n" ' sdl-image SDL Image support for icons'
printf "%s\n" ' seccomp seccomp support'
printf "%s\n" ' selinux SELinux support in qemu-nbd'
printf "%s\n" ' slirp libslirp user mode network backend support'
printf "%s\n" ' slirp-smbd use smbd (at path --smbd=*) in slirp networking'
printf "%s\n" ' smartcard CA smartcard emulation support'
printf "%s\n" ' snappy snappy compression support'
@ -387,7 +386,6 @@ _meson_option_parse() {
--disable-selinux) printf "%s" -Dselinux=disabled ;;
--enable-slirp) printf "%s" -Dslirp=enabled ;;
--disable-slirp) printf "%s" -Dslirp=disabled ;;
--enable-slirp=*) quote_sh "-Dslirp=$2" ;;
--enable-slirp-smbd) printf "%s" -Dslirp_smbd=enabled ;;
--disable-slirp-smbd) printf "%s" -Dslirp_smbd=disabled ;;
--enable-smartcard) printf "%s" -Dsmartcard=enabled ;;

1
slirp

@ -1 +0,0 @@
Subproject commit 9d59bb775d6294c8b447a88512f7bb43f12a25a8

10
target/s390x/gen-features.c
View File

@ -744,13 +744,20 @@ static uint16_t qemu_V7_0[] = {
S390_FEAT_MISC_INSTRUCTION_EXT3,
};
static uint16_t qemu_V7_1[] = {
S390_FEAT_VECTOR_ENH2,
};
/*
* Features for the "qemu" CPU model of the latest QEMU machine and the "max"
* CPU model under TCG. Don't include features that are not part of the full
* feature set of the current "max" CPU model generation.
*/
static uint16_t qemu_MAX[] = {
S390_FEAT_VECTOR_ENH2,
S390_FEAT_MSA_EXT_5,
S390_FEAT_KIMD_SHA_512,
S390_FEAT_KLMD_SHA_512,
S390_FEAT_PRNO_TRNG,
};
/****** END FEATURE DEFS ******/
@ -873,6 +880,7 @@ static FeatGroupDefSpec QemuFeatDef[] = {
QEMU_FEAT_INITIALIZER(V6_0),
QEMU_FEAT_INITIALIZER(V6_2),
QEMU_FEAT_INITIALIZER(V7_0),
QEMU_FEAT_INITIALIZER(V7_1),
QEMU_FEAT_INITIALIZER(MAX),
};

7
target/s390x/kvm/kvm.c
View File

@ -157,6 +157,7 @@ static int cap_ri;
static int cap_hpage_1m;
static int cap_vcpu_resets;
static int cap_protected;
static int cap_zpci_op;
static bool mem_op_storage_key_support;
@ -362,6 +363,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ);
cap_vcpu_resets = kvm_check_extension(s, KVM_CAP_S390_VCPU_RESETS);
cap_protected = kvm_check_extension(s, KVM_CAP_S390_PROTECTED);
cap_zpci_op = kvm_check_extension(s, KVM_CAP_S390_ZPCI_OP);
kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0);
kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0);
@ -2574,3 +2576,8 @@ bool kvm_arch_cpu_check_are_resettable(void)
{
return true;
}
int kvm_s390_get_zpci_op(void)
{
return cap_zpci_op;
}

1
target/s390x/kvm/kvm_s390x.h
View File

@ -27,6 +27,7 @@ void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu);
int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu);
int kvm_s390_get_hpage_1m(void);
int kvm_s390_get_ri(void);
int kvm_s390_get_zpci_op(void);
int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_clock);
int kvm_s390_get_clock_ext(uint8_t *tod_high, uint64_t *tod_clock);
int kvm_s390_set_clock(uint8_t tod_high, uint64_t tod_clock);

259
target/s390x/tcg/crypto_helper.c
View File

@ -1,10 +1,12 @@
/*
* s390x crypto helpers
*
* Copyright (C) 2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
* Copyright (c) 2017 Red Hat Inc
*
* Authors:
* David Hildenbrand <david@redhat.com>
* Jason A. Donenfeld <Jason@zx2c4.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@ -12,12 +14,262 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
#include "qemu/guest-random.h"
#include "s390x-internal.h"
#include "tcg_s390x.h"
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
static uint64_t R(uint64_t x, int c)
{
return (x >> c) | (x << (64 - c));
}
static uint64_t Ch(uint64_t x, uint64_t y, uint64_t z)
{
return (x & y) ^ (~x & z);
}
static uint64_t Maj(uint64_t x, uint64_t y, uint64_t z)
{
return (x & y) ^ (x & z) ^ (y & z);
}
static uint64_t Sigma0(uint64_t x)
{
return R(x, 28) ^ R(x, 34) ^ R(x, 39);
}
static uint64_t Sigma1(uint64_t x)
{
return R(x, 14) ^ R(x, 18) ^ R(x, 41);
}
static uint64_t sigma0(uint64_t x)
{
return R(x, 1) ^ R(x, 8) ^ (x >> 7);
}
static uint64_t sigma1(uint64_t x)
{
return R(x, 19) ^ R(x, 61) ^ (x >> 6);
}
static const uint64_t K[80] = {
0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL
};
/* a is icv/ocv, w is a single message block. w will get reused internally. */
static void sha512_bda(uint64_t a[8], uint64_t w[16])
{
uint64_t t, z[8], b[8];
int i, j;
memcpy(z, a, sizeof(z));
for (i = 0; i < 80; i++) {
memcpy(b, a, sizeof(b));
t = a[7] + Sigma1(a[4]) + Ch(a[4], a[5], a[6]) + K[i] + w[i % 16];
b[7] = t + Sigma0(a[0]) + Maj(a[0], a[1], a[2]);
b[3] += t;
for (j = 0; j < 8; ++j) {
a[(j + 1) % 8] = b[j];
}
if (i % 16 == 15) {
for (j = 0; j < 16; ++j) {
w[j] += w[(j + 9) % 16] + sigma0(w[(j + 1) % 16]) +
sigma1(w[(j + 14) % 16]);
}
}
}
for (i = 0; i < 8; i++) {
a[i] += z[i];
}
}
/* a is icv/ocv, w is a single message block that needs be64 conversion. */
static void sha512_bda_be64(uint64_t a[8], uint64_t w[16])
{
uint64_t t[16];
int i;
for (i = 0; i < 16; i++) {
t[i] = be64_to_cpu(w[i]);
}
sha512_bda(a, t);
}
static void sha512_read_icv(CPUS390XState *env, uint64_t addr,
uint64_t a[8], uintptr_t ra)
{
int i;
for (i = 0; i < 8; i++, addr += 8) {
addr = wrap_address(env, addr);
a[i] = cpu_ldq_be_data_ra(env, addr, ra);
}
}
static void sha512_write_ocv(CPUS390XState *env, uint64_t addr,
uint64_t a[8], uintptr_t ra)
{
int i;
for (i = 0; i < 8; i++, addr += 8) {
addr = wrap_address(env, addr);
cpu_stq_be_data_ra(env, addr, a[i], ra);
}
}
static void sha512_read_block(CPUS390XState *env, uint64_t addr,
uint64_t a[16], uintptr_t ra)
{
int i;
for (i = 0; i < 16; i++, addr += 8) {
addr = wrap_address(env, addr);
a[i] = cpu_ldq_be_data_ra(env, addr, ra);
}
}
static void sha512_read_mbl_be64(CPUS390XState *env, uint64_t addr,
uint8_t a[16], uintptr_t ra)
{
int i;
for (i = 0; i < 16; i++, addr += 1) {
addr = wrap_address(env, addr);
a[i] = cpu_ldub_data_ra(env, addr, ra);
}
}
static int cpacf_sha512(CPUS390XState *env, uintptr_t ra, uint64_t param_addr,
uint64_t *message_reg, uint64_t *len_reg, uint32_t type)
{
enum { MAX_BLOCKS_PER_RUN = 64 }; /* Arbitrary: keep interactivity. */
uint64_t len = *len_reg, a[8], processed = 0;
int i, message_reg_len = 64;
g_assert(type == S390_FEAT_TYPE_KIMD || type == S390_FEAT_TYPE_KLMD);
if (!(env->psw.mask & PSW_MASK_64)) {
len = (uint32_t)len;
message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
}
/* KIMD: length has to be properly aligned. */
if (type == S390_FEAT_TYPE_KIMD && !QEMU_IS_ALIGNED(len, 128)) {
tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra);
}
sha512_read_icv(env, param_addr, a, ra);
/* Process full blocks first. */
for (; len >= 128; len -= 128, processed += 128) {
uint64_t w[16];
if (processed >= MAX_BLOCKS_PER_RUN * 128) {
break;
}
sha512_read_block(env, *message_reg + processed, w, ra);
sha512_bda(a, w);
}
/* KLMD: Process partial/empty block last. */
if (type == S390_FEAT_TYPE_KLMD && len < 128) {
uint8_t x[128];
/* Read the remainder of the message byte-per-byte. */
for (i = 0; i < len; i++) {
uint64_t addr = wrap_address(env, *message_reg + processed + i);
x[i] = cpu_ldub_data_ra(env, addr, ra);
}
/* Pad the remainder with zero and set the top bit. */
memset(x + len, 0, 128 - len);
x[len] = 128;
/*
* Place the MBL either into this block (if there is space left),
* or use an additional one.
*/
if (len < 112) {
sha512_read_mbl_be64(env, param_addr + 64, x + 112, ra);
}
sha512_bda_be64(a, (uint64_t *)x);
if (len >= 112) {
memset(x, 0, 112);
sha512_read_mbl_be64(env, param_addr + 64, x + 112, ra);
sha512_bda_be64(a, (uint64_t *)x);
}
processed += len;
len = 0;
}
/*
* Modify memory after we read all inputs and modify registers only after
* writing memory succeeded.
*
* TODO: if writing fails halfway through (e.g., when crossing page
* boundaries), we're in trouble. We'd need something like access_prepare().
*/
sha512_write_ocv(env, param_addr, a, ra);
*message_reg = deposit64(*message_reg, 0, message_reg_len,
*message_reg + processed);
*len_reg -= processed;
return !len ? 0 : 3;
}
static void fill_buf_random(CPUS390XState *env, uintptr_t ra,
uint64_t *buf_reg, uint64_t *len_reg)
{
uint8_t tmp[256];
uint64_t len = *len_reg;
int buf_reg_len = 64;
if (!(env->psw.mask & PSW_MASK_64)) {
len = (uint32_t)len;
buf_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24;
}
while (len) {
size_t block = MIN(len, sizeof(tmp));
qemu_guest_getrandom_nofail(tmp, block);
for (size_t i = 0; i < block; ++i) {
cpu_stb_data_ra(env, wrap_address(env, *buf_reg), tmp[i], ra);
*buf_reg = deposit64(*buf_reg, 0, buf_reg_len, *buf_reg + 1);
--*len_reg;
}
len -= block;
}
}
uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
uint32_t type)
{
@ -52,6 +304,13 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3,
cpu_stb_data_ra(env, param_addr, subfunc[i], ra);
}
break;
case 3: /* CPACF_*_SHA_512 */
return cpacf_sha512(env, ra, env->regs[1], &env->regs[r2],
&env->regs[r2 + 1], type);
case 114: /* CPACF_PRNO_TRNG */
fill_buf_random(env, ra, &env->regs[r1], &env->regs[r1 + 1]);
fill_buf_random(env, ra, &env->regs[r2], &env->regs[r2 + 1]);
break;
default:
/* we don't implement any other subfunction yet */
g_assert_not_reached();

2
target/s390x/tcg/insn-data.def
View File

@ -466,7 +466,7 @@
C(0xe39f, LAT, RXY_a, LAT, 0, m2_32u, r1, 0, lat, 0)
C(0xe385, LGAT, RXY_a, LAT, 0, a2, r1, 0, lgat, 0)
/* LOAD AND ZERO RIGHTMOST BYTE */
C(0xe3eb, LZRF, RXY_a, LZRB, 0, m2_32u, new, r1_32, lzrb, 0)
C(0xe33b, LZRF, RXY_a, LZRB, 0, m2_32u, new, r1_32, lzrb, 0)
C(0xe32a, LZRG, RXY_a, LZRB, 0, m2_64, r1, 0, lzrb, 0)
/* LOAD LOGICAL AND ZERO RIGHTMOST BYTE */
C(0xe33a, LLZRGF, RXY_a, LZRB, 0, m2_32u, r1, 0, lzrb, 0)

1
tests/avocado/machine_s390_ccw_virtio.py
View File

@ -66,6 +66,7 @@ class S390CCWVirtioMachine(QemuSystemTest):
'-kernel', kernel_path,
'-initrd', initrd_path,
'-append', kernel_command_line,
'-cpu', 'max,prno-trng=off',
'-device', 'virtio-net-ccw,devno=fe.1.1111',
'-device',
'virtio-rng-ccw,devno=fe.2.0000,max_revision=0,id=rn1',

4
util/qemu-config.c
View File

@ -236,6 +236,10 @@ static QemuOptsList machine_opts = {
.help = "Up to 8 chars in set of [A-Za-z0-9. ](lower case chars"
" converted to upper case) to pass to machine"
" loader, boot manager, and guest kernel",
},{
.name = "zpcii-disable",
.type = QEMU_OPT_BOOL,
.help = "disable zPCI interpretation facilities",
},
{ /* End of list */ }
}