Commit Graph

69354 Commits (243dc2cf95298383b657cf95896615197d8b35aa)

Author SHA1 Message Date
Peter Maydell f2a930ad8c qemu-sparc queue
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAlzef04eHG1hcmsuY2F2
 ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIfsIcIAJYsAv59etzYmqCA
 rGvoma0FypA3SO2+zeqqH8r0b/gaO7b56aXxTIAVhPvf3mskwQ+ffVsxRZ+zIflj
 CCo/PM4OBhqiOvK0qbbOxB0MmrrfGxMKrkUq0tuUubRH3T9fE5TSN3m3ObAHxgvq
 wZFYmeOmlAOhqyqAWARP0xVPNRNcWTVdThSA6viW1FedWsxtMV/Om4bXmidTY7nm
 CKAMdndqqYAgE9oVgFzfd46db4AGWKKIcTS+mrm8Y61hB1YuG7r+Bgu9qFcnjgcV
 AHeGbRDZ0LY0jsAXZkAbRpYyCOsuYW6+yaDKt9h6meLJ7jpzonw4lARFFJtb9a/4
 Kt6RBm0=
 =UzYZ
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20190517' into staging

qemu-sparc queue

# gpg: Signature made Fri 17 May 2019 10:30:54 BST
# gpg:                using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg:                issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-20190517:
  MAINTAINERS: add myself for leon3
  leon3: introduce the plug and play mechanism
  leon3: add a little bootloader
  grlib, apbuart: get rid of the old-style create function
  grlib, gptimer: get rid of the old-style create function
  grlib, irqmp: get rid of the old-style create function
  leon3: fix the error message when no bios are provided
  hw/char/escc: Lower irq when transmit buffer is filled

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-17 15:46:37 +01:00
Cornelia Huck e85decf2f1 Implement all Vector Integer Instructions introduced with the
"Vector Facility" for s390x TCG.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc3p0EAAoJEE3eEPcA/4NaPr0QALKxtoN0YbkLkX0zbyyMa8P4
 hqGPOy2G1iaD0Z2cAlCtEdVyHrUBpbLO4ReWc8YyqHHYsRJwUjDLwU/mpLZf4anO
 mc2AepXiB+c3IItMWYQaUICOwu6mfmdLs8dHnByl3H7+hew8yDq+sYONeMwhwJRB
 vlLqKJyDn0y74enXtljEYuvMmoB/sVYQ+2WD+Oe+hBKa68Ds0ec5ZN0g8KU+33zE
 35Tvkd/DHc5diNQC2U8goHfao76VwF9lm6azUUewx9Kontqq/BFInLqadA3v24+L
 VGU7RwTM/93p8NsWGKtuosi9YlsA+qJNRXxXI8KiLGL4wEDoArcegErDXuqMvlyv
 w8ZQOBx5sk/MFfoFVg/zFnz5QySMOMEAXJ7TFEdTbPf/NFQ5WCe77ejASWnfG/fi
 Zp4HeGzezb1/6hnvLKdbGNse0WocH0+xzY39j7/FpbjyAOtJe3MRx0cZzc+9fSWU
 urMbfvVf9oDkbByiVuLvuPVA7+wbZ0UcntLhW1H8brLKUav814mCRxTOwclwSmzo
 sINqFVg89UBGCDQfRR5L+di2YpIKySorxM4V8APntc3cF3n5JWvj6Q2AdXi1ChrK
 fIRw867Au25yUmifgfn3CK1e4XknGIGS4JRpVbMs1hNavJfaNOH6lGAtlSwWCZkX
 JzP/X/MxAUjX57YK+xHz
 =5pRI
 -----END PGP SIGNATURE-----

Merge tag 's390x-tcg-2019-05-17-2' into s390-next-staging

Implement all Vector Integer Instructions introduced with the
"Vector Facility" for s390x TCG.

# gpg: Signature made Fri 17 May 2019 01:37:40 PM CEST
# gpg:                using RSA key 4DDE10F700FF835A
# gpg: Good signature from "David Hildenbrand <david@redhat.com>" [full]
# gpg:                 aka "David Hildenbrand <davidhildenbrand@gmail.com>" [full]

* tag 's390x-tcg-2019-05-17-2': (40 commits)
  s390x/tcg: Implement VECTOR TEST UNDER MASK
  s390x/tcg: Implement VECTOR SUM ACROSS WORD
  s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD
  s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD
  s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION
  s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW INDICATION
  s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION
  s390x/tcg: Implement VECTOR SUBTRACT
  s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL *
  s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC
  s390x/tcg: Implement VECTOR SHIFT LEFT DOUBLE BY BYTE
  s390x/tcg: Implement VECTOR SHIFT LEFT (BY BYTE)
  s390x/tcg: Implement VECTOR ELEMENT SHIFT
  s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT UNDER MASK
  s390x/tcg: Implement VECTOR ELEMENT ROTATE LEFT LOGICAL
  s390x/tcg: Implement VECTOR POPULATION COUNT
  s390x/tcg: Implement VECTOR OR WITH COMPLEMENT
  s390x/tcg: Implement VECTOR OR
  s390x/tcg: Implement VECTOR NOT EXCLUSIVE OR
  s390x/tcg: Implement VECTOR NOR
  ...

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-17 15:40:33 +02:00
Philippe Mathieu-Daudé 7a188f2b57 hw/net/ne2000: Extract the PCI device from the chipset common code
The ne2000.c file contains functions common the the ISA and PCI
devices. To allow to build with one or another, extract the PCI
specific part into a new file.

This fix an issue where the NE2000_ISA Kconfig had to pull the
full PCI core objects.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190504123538.14952-1-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:39 +02:00
Thomas Huth d09ecd8c14 hw/char: Move multi-serial devices into separate file
In our downstream distribution of QEMU, we'd like to ship the binary
without the multi-serial PCI devices. To make this disablement easier,
let's move the devices into a separate file and add a proper Kconfig-
switch for these devices.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1554036028-31410-1-git-send-email-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:39 +02:00
Vitaly Kuznetsov 958a01dab8 ioapic: allow buggy guests mishandling level-triggered interrupts to make progress
It was found that Hyper-V 2016 on KVM in some configurations (q35 machine +
piix4-usb-uhci) hangs on boot. Root-cause was that one of Hyper-V
level-triggered interrupt handler performs EOI before fixing the cause of
the interrupt. This results in IOAPIC keep re-raising the level-triggered
interrupt after EOI because irq-line remains asserted.

Gory details: https://www.spinics.net/lists/kvm/msg184484.html
(the whole thread).

Turns out we were dealing with similar issues before; in-kernel IOAPIC
implementation has commit 184564efae4d ("kvm: ioapic: conditionally delay
irq delivery duringeoi broadcast") which describes a very similar issue.

Steal the idea from the above mentioned commit for IOAPIC implementation in
QEMU. SUCCESSIVE_IRQ_MAX_COUNT, delay and the comment are borrowed as well.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20190402080215.10747-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:39 +02:00
Laurent Vivier 29de280401 build: don't build hardware objects with linux-user
Some objects are only needed for system emulation and tools.
We can ignore them for the user mode case

Update tests to run accordingly: conditionally build some tests
on CONFIG_BLOCK.

Some tests use components that are only built when softmmu or
block tools are enabled, not for linux-user. So, if these components
are not available, disable the tests.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20190401141222.30034-6-lvivier@redhat.com>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
2019-05-17 15:19:39 +02:00
Laurent Vivier 8d5d515a0f build: chardev is only needed for softmmu targets
Move the dependency from SUBDIR_RULES to SOFTMMU_SUBDIR_RULES

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20190401141222.30034-5-lvivier@redhat.com>
2019-05-17 15:19:39 +02:00
Laurent Vivier a512590595 configure: qemu-ga is only needed with softmmu targets
Remove it from the list of tools if --disable-system
and --disable-tools are used as we don't need it for
linux-user targets.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
[lv: I also disable it with disable-tools, not only with disable-system]
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20190401141222.30034-4-lvivier@redhat.com>
2019-05-17 15:19:39 +02:00
Laurent Vivier 3dff199cca build: replace GENERATED_FILES by generated-files-y
When possible use generated-files-$(FLAG) to disable
some targets (like KEYCODEMAP_FILES).

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20190401141222.30034-3-lvivier@redhat.com>
2019-05-17 15:19:39 +02:00
Laurent Vivier 5b4a969a70 trace: only include trace-event-subdirs when they are needed
Some directories are built only for softmmu targets,
and the related trace-event-subdirs must do the same

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20190401141222.30034-2-lvivier@redhat.com>
2019-05-17 15:19:38 +02:00
Paolo Bonzini 6807874d55 sun4m: obey -vga none
Do not create a TCX if "-vga none" was passed on the command line.
Remove some dead code along the way to avoid big reindentation.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:38 +02:00
Paolo Bonzini 78c37d88f1 mips-fulong2e: obey -vga none
Do not create an ATI VGA if "-vga none" was passed on the command line.

Cc: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:38 +02:00
Philippe Mathieu-Daudé 6fa5171f4f hw/i386/acpi: Assert a pointer is not null BEFORE using it
Commit 72c194f7e7 added a non-null check on the 'obj' pointer.
Later, commit 500b11ea50 added code which uses the 'obj'
pointer _before_ the assertion check. Move the assertion
_before_ the pointer use.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190427144025.22880-4-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:32 +02:00
Philippe Mathieu-Daudé 81c48dd796 hw/i386/acpi: Add object_resolve_type_unambiguous to improve modularity
When building with CONFIG_Q35=n, we get:

    LINK    x86_64-softmmu/qemu-system-x86_64
  /usr/bin/ld: hw/i386/acpi-build.o: in function `acpi_get_misc_info':
  /source/qemu/hw/i386/acpi-build.c:243: undefined reference to `ich9_lpc_find'
  collect2: error: ld returned 1 exit status
  make[1]: *** [Makefile:204: qemu-system-x86_64] Error 1

This is due to a dependency in acpi-build.c on the ICH9_LPC
(via ich9_lpc_find) and PIIX4_PM (via piix4_pm_find) devices.

To allow better modularity (compile acpi-build.c with only
Q35/ICH9 or ISAPC/PIIX4), refactor the similar helper as
object_resolve_type_unambiguous(). This way we relax the
linker dependencies and can build the x86 targets with a
selection of machines (instead of all of them).

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190427144025.22880-3-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:24 +02:00
Philippe Mathieu-Daudé f5e0a8f42f hw/acpi/piix4: Move TYPE_PIIX4_PM to a public header
Move the TYPE_PIIX4_PM definition to the corresponding header,
so other files can use it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190427144025.22880-2-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-05-17 15:19:19 +02:00
Gerd Hoffmann 5fff13f245 kbd-state: fix autorepeat handling
When allowing multiple down-events in a row (key autorepeat) we can't
use change_bit() any more to update the state, because autorepeat events
don't change the key state.  We have to explicitly use set_bit() and
clear_bit() instead.

Cc: qemu-stable@nongnu.org
Fixes: 3592186015 kbd-state: don't block auto-repeat events
Buglink: https://bugs.launchpad.net/qemu/+bug/1828272
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20190514042443.10735-1-kraxel@redhat.com
2019-05-17 13:21:40 +02:00
HOU Qiming bfafa473ed ui/console: Precautionary glBindTexture and surface->texture validation in surface_gl_update_texture
In a GVT-g setup with dmabuf and GTK GUI, the current 2D texture at
surface_gl_update_texture is not necessarily
surface->texture. Adding a glBindTexture fixes related crashes and
artifacts, and is generally more secure.

Signed-off-by: HOU Qiming <hqm03ster@gmail.com>
Tested-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com>
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Message-id: 20190507080501.26712-1-marcel.apfelbaum@gmail.com
[fixed malformed patch, rebase to master]
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-17 13:21:40 +02:00
Samuel Thibault 962cf8fd4f ui/curses: manipulate cchar_t with standard curses functions
The chars/attr fields are curses internals, setcchar and getcchar have
to be used instead.

Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Tested-by: Kamil Rytarowski <n54@gmx.com>
Message-Id: <20190427183307.12796-3-samuel.thibault@ens-lyon.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-17 13:21:40 +02:00
Samuel Thibault b7b664a4fe ui/curses: do not assume wchar_t contains unicode
E.g. BSD and Solaris even use locale-specific encoding there.

We thus have to go through the native multibyte representation and use
mbrtowc/wcrtomb to make a proper conversion.

Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Tested-by: Kamil Rytarowski <n54@gmx.com>
Message-Id: <20190427183307.12796-2-samuel.thibault@ens-lyon.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-17 13:21:40 +02:00
Peter Maydell e48a748fc8 -----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
 
 iQEcBAABAgAGBQJc3nheAAoJEO8Ells5jWIRYLsH/2d/dey3FZjkwxFDy/06qFSE
 VmFtvgd47+hVV0xcHxLShjFa9MGyVplDgRzCc584ffFWkPcvZ+aRP7t0KS70pCzn
 mD0FmBZtdM7jO3J3Ro5nvYH3X/+onCvvBj/SJoHVhOyW5gXnIVPGktYsEXyN295o
 geWoFIywCQhm4W4/NkelFk8o9etpitnIb1r8YQBRpxF6XTHMxL068FBWK19VcEWg
 gUq1nHE17z1ASU+DdzC5bH090Vygx0exsXTqrFAIDhaZrLxpfKRbHK2DkWvEppNW
 HammwTmh2AS76pOTmVvQZEZb4Eoc1ctk1quXGIdSPVeh2XbalPN26BNs10VGOA4=
 =rQKs
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging

# gpg: Signature made Fri 17 May 2019 10:01:18 BST
# gpg:                using RSA key EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 215D 46F4 8246 689E C77F  3562 EF04 965B 398D 6211

* remotes/jasowang/tags/net-pull-request:
  net/colo-compare.c: Fix a crash in COLO Primary.
  net/slirp: fix the IPv6 prefix length error message
  e1000: Never increment the RX undersize count register
  vhost_net: don't set backend for the uninitialized virtqueue

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-17 11:40:23 +01:00
Peter Maydell b0f9690e78 code cleanup, switch to transaction_failed hook
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc3eUcAAoJEPMMOL0/L748uRwP+QHQ6SUyKPTtopJYpw3drcyz
 HRQ0uYoJzc/U4oNEA9wb1o3MTREoRrRtl9N3fc2QwF96+55WPqoOVPNmvztpkRIu
 T51gdg3R5ormDvn7fYlf75tKzj4N2KgblsFcJ2Da++M1tIlvdhT2+JvZ/Pe437Ig
 GaXAPCO4RwQIhI+CMwd19C+D8jqDFIPi5rs923YMg4/t1+cpm+iYKIb3+s4gLzap
 hcqiAHEdGX836EKlQYmsHbs01FiSUzRccMGAr3WgelyPHKirSKw/Q752BmvpmidT
 bV9SYcZ7dGn9mrQ2RfEjD6ATWdjZmGO6jt0W7f1cWXKn1AlhJmOd6LPerschzVHm
 lTtuN8Dy8YLuwO0X8pjzLYvhsfWy2QD21DrC2biG8DTSXrI1ucFaDPx3twXp5B8H
 Y/vlEXq3wVcs/vc6kUuNgs8f8EwLmuPnSKMc1qcwH3vjFCAWnpSXbo6HuUqby+UC
 pfYaD/2reoipekWvdz1u+ptaozvy6pVFO2Mvb+rJA0OhIsFWzGXz92YIXSg97Iyf
 QtXUTgRo82NKqdA4+6+5XAc0r9o3quSO74beAYlfwvRPagUAvYVH4Q2OLkXNEmYc
 aq2qmrDCo/2B0j8bw8JTMjnZOPQAuWOy2Hau+VzsxyitEE/LCtUTOd4L4EJ4QIp+
 jmFcdhD98HTtQ+OQF3Zm
 =d7qy
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-staging-pull-request' into staging

code cleanup, switch to transaction_failed hook

# gpg: Signature made Thu 16 May 2019 23:33:00 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-staging-pull-request:
  target/m68k: Optimize rotate_x() using extract_i32()
  target/m68k: Fix a tcg_temp leak
  target/m68k: Reduce the l1 TCGLabel scope
  target/m68k: Switch to transaction_failed hook
  target/m68k: In get_physical_address() check for memory access failures
  target/m68k: In dump_address_map() check for memory access failures

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	target/m68k/cpu.h
2019-05-17 10:28:23 +01:00
Lukas Straub 78e4f446d2 net/colo-compare.c: Fix a crash in COLO Primary.
Because event_unhandled_count may be accessed concurrently, it needs
to be protected by taking the lock. However the assert is outside the
lock, probably causing it to read garbage and aborting Qemu erroneously.

The Bug only happens when running Qemu in COLO mode.

This Patch fixes the following bug: https://bugs.launchpad.net/qemu/+bug/1824622

Signed-off-by: Lukas Straub <lukasstraub2@web.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Zhang Chen <chen.zhang@intel.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2019-05-17 17:00:12 +08:00
Stefano Garzarella 178a0a5dea net/slirp: fix the IPv6 prefix length error message
Reword and add a missing parentheses at the end of the
error message.

Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2019-05-17 17:00:12 +08:00
Chris Kenna 427ceb0fec e1000: Never increment the RX undersize count register
In situations where e1000 receives an undersized Ethernet frame,
QEMU increments the emulated "Receive Undersize Count (RUC)"
register when padding the frame.

This is incorrect because this an expected scenario (e.g. with
VLAN tag stripping) and not an error. As such, QEMU should not
increment the emulated RUC.

Fixes: 3b27430177 ("e1000: Implementing various counters")

Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Reviewed-by: Bhavesh Davda <bhavesh.davda@oracle.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Chris Kenna <chris.kenna@oracle.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2019-05-17 17:00:12 +08:00
Jason Wang 23bfaf77fa vhost_net: don't set backend for the uninitialized virtqueue
We used to set backend unconditionally, this won't work for some
guests (e.g windows driver) who may not initialize all virtqueues. For
kernel backend, this will fail since it may try to validate the rings
during setting backend.

Fixing this by simply skipping the backend set when we find desc is
not ready.

Reviewed-by: Michael S. Tsirkin<mst@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
2019-05-17 17:00:12 +08:00
David Hildenbrand db156ebfae s390x/tcg: Implement VECTOR TEST UNDER MASK
Let's return the cc value directly via cpu_env. Unfortunately there
isn't a simple way to calculate the value lazily - one would have to
calculate and store e.g. the population count of the mask and the
result so it can be evaluated in a cc helper.

But as VTM only sets the cc, we can assume the value will be needed soon
either way.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand e58de341d9 s390x/tcg: Implement VECTOR SUM ACROSS WORD
Similar to VECTOR SUM ACROSS DOUBLEWORD.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 8dc69a196e s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD
Similar to VECTOR SUM ACROSS DOUBLEWORD, however without a loop and
using 128-bit calculations.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand fe2be36d26 s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD
Perform the calculations without a helper. Only 16 bit or 32 bit values
have to be added.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand bc725e6515 s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION
Mostly courtesy of Richard H.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 48390a7c27 s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW INDICATION
Fairly easy as only 128-bit handling is required. Simply perform the
subtraction and then subtract the borrow.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 1ee2d7ba72 s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION
Let's keep it simple for now and handle 8/16 bit elements via helpers.
Especially for 8/16, we could come up with some bit tricks.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand ea8d7840f5 s390x/tcg: Implement VECTOR SUBTRACT
We can use tcg_gen_sub2_i64() to do 128-bit subtraction and otherwise
existing gvec helpers.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 8112274f86 s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL *
Similar to VECTOR SHIFT RIGHT ARITHMETICAL.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 5f724887e3 s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC
Similar to VECTOR SHIFT LEFT ARITHMETIC. Add s390_vec_sar() similar to
s390_vec_shr().

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 0abddd6cbf s390x/tcg: Implement VECTOR SHIFT LEFT DOUBLE BY BYTE
Inline expansion courtesy of Richard H.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand dea33fc31b s390x/tcg: Implement VECTOR SHIFT LEFT (BY BYTE)
We can reuse the existing 128-bit shift utility function.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 5f164905b2 s390x/tcg: Implement VECTOR ELEMENT SHIFT
We can use all the fancy new vector helpers implemented by Richard.

One important thing to take care of is always to properly mask of
unused bits from the shift count.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 5c4b0ab460 s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT UNDER MASK
Use the new vector expansion for GVecGen3i.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 55236da222 s390x/tcg: Implement VECTOR ELEMENT ROTATE LEFT LOGICAL
Take care of properly taking the modulo of the count. We might later
want to come back and create a variant of VERLL where the base register
is 0, resulting in an immediate.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand c3838aaae0 s390x/tcg: Implement VECTOR POPULATION COUNT
Similar to VECTOR COUNT TRAILING ZEROES.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand a014bcc7bc s390x/tcg: Implement VECTOR OR WITH COMPLEMENT
Again, vector enhancements facility 1 material.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 2bbf4dff3f s390x/tcg: Implement VECTOR OR
Reuse a gvec helper.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 9023434b67 s390x/tcg: Implement VECTOR NOT EXCLUSIVE OR
Again, part of vector enhancement facility 1. The operation corresponds
to an bitwise equality check.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 2a01d94c0a s390x/tcg: Implement VECTOR NOR
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 5bc4a20fab s390x/tcg: Implement VECTOR NAND
Part of vector enhancements facility 1, but easy to implement.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 2bf3ee38f1 s390x/tcg: Implement VECTOR MULTIPLY *
Yet another set of variants. Implement it similar to VECTOR MULTIPLY AND
ADD *. At least for one variant we have a gvec helper we can reuse.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 1b430aec41 s390x/tcg: Implement VECTOR MULTIPLY AND ADD *
Quite some variants to handle. At least handle some 32-bit element
variants via gvec expansion (we could also handle 16/32-bit variants
for ODD and EVEN easily via gvec expansion, but let's keep it simple
for now).

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 86f521b601 s390x/tcg: Implement VECTOR (MAXIMUM|MINIMUM) (LOGICAL)
Luckily, we already have gvec helpers for all four cases.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00
David Hildenbrand 35f0ba5fe1 s390x/tcg: Implement VECTOR LOAD POSITIVE
Similar to VECTOR LOAD COMPLEMENT.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
2019-05-17 10:54:13 +02:00