mirror_qemu

Commit Graph

Author	SHA1	Message	Date
Andreas Färber	d4a5b622b5	xtensa-semi: Don't use CPUState Scripted conversion: sed -i "s/CPUState/CPUXtensaState/g" xtensa-semi.c Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>	2012-03-14 22:20:26 +01:00
Max Filippov	1ddeaa5d42	target-xtensa: implement SIMCALL Tensilica iss provides support for applications running in freestanding environment through SIMCALL command. It is used by Tensilica libc to access argc/argv, for file I/O, etc. Note that simcalls that accept buffer addresses expect virtual addresses. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>	2011-09-10 16:57:39 +00:00

Author

SHA1

Message

Date

Andreas Färber

d4a5b622b5

xtensa-semi: Don't use CPUState

Scripted conversion:
  sed -i "s/CPUState/CPUXtensaState/g" xtensa-semi.c

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>

2012-03-14 22:20:26 +01:00

Max Filippov

1ddeaa5d42

target-xtensa: implement SIMCALL

Tensilica iss provides support for applications running in freestanding
environment through SIMCALL command. It is used by Tensilica libc to
access argc/argv, for file I/O, etc.

Note that simcalls that accept buffer addresses expect virtual addresses.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

2011-09-10 16:57:39 +00:00

2 Commits (bb5d8dd757eaa8f9a048c5205c69bed20ea373d1)