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203 Commits (da0a932bbf06a71210300893eeb4d51217238b11)

Author SHA1 Message Date
Claudio Fontana 7deea126b2 tcg/aarch64: implement AND/TEST immediate pattern 
add functions to AND/TEST registers with immediate patterns.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 51AC9A0C.3090303@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2013-06-12 16:20:22 +01:00
Claudio Fontana 36fac14a64 tcg/aarch64: improve arith shifted regs operations 
for arith operations, add SUBS, ANDS, ADDS and add a shift parameter
so that all arith instructions can make use of shifted registers.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 51AC998B.7070506@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2013-06-12 16:20:22 +01:00
Claudio Fontana 4a136e0a6b tcg/aarch64: implement new TCG target for aarch64 
add preliminary support for TCG target aarch64.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 51A5C596.3090108@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2013-06-12 16:20:22 +01:00