mirror_qemu/include/hw/block
Cédric Le Goater a7538ca079 aspeed/smc: Only wire flash devices at reset
The Aspeed machines have many Static Memory Controllers (SMC), up to
8, which can only drive flash memory devices. Commit 27a2c66c92
("aspeed/smc: Wire CS lines at reset") tried to ease the definitions
of these devices by allowing flash devices from the command line to be
attached to a SSI bus. For that, the wiring of the CS lines of the
Aspeed SMC controller was moved at reset. Two assumptions are made
though, first that the device has a SSI_GPIO_CS GPIO line, which is
not always the case, and second that it is a flash device.

Correct this problem by ensuring that the devices attached to the bus
are of the correct flash type. This fixes a QEMU abort when devices
without a CS line, such as the max111x, are passed on the command
line.

While at it, export TYPE_M25P80 used in the Xilinx Versal Virtual
machine.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2228
Fixes: 27a2c66c92 ("aspeed/smc: Wire CS lines at reset")
Reported-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
[ clg: minor fixes in the commit log ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2024-03-19 11:58:15 +01:00
..
block.h hw/block/block.c: improve confusing blk_check_size_and_read_all() error 2024-01-30 16:19:00 -05:00
fdc.h hw/block/fdc-isa: Implement relocation and enabling/disabling for TYPE_ISA_FDC 2024-02-14 06:09:32 -05:00
flash.h aspeed/smc: Only wire flash devices at reset 2024-03-19 11:58:15 +01:00
swim.h swim: update IWM/ISM register block decoding 2023-10-06 10:33:43 +02:00