mirror_qemu/tcg/arm/tcg-target-reg-bits.h

13 lines
213 B
C

/* SPDX-License-Identifier: MIT */
/*
* Define target-specific register size
* Copyright (c) 2023 Linaro
*/
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS 32
#endif