mirror of https://github.com/proxmox/mirror_qemu
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
/*
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* host-signal.h: signal info dependent on the host architecture
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2021 Linaro Limited
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*
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* This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef MIPS_HOST_SIGNAL_H
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#define MIPS_HOST_SIGNAL_H
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static inline uintptr_t host_signal_pc(ucontext_t *uc)
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{
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return uc->uc_mcontext.pc;
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}
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static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
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{
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uc->uc_mcontext.pc = pc;
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}
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#if defined(__misp16) || defined(__mips_micromips)
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#error "Unsupported encoding"
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#endif
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static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
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{
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uint32_t insn = *(uint32_t *)host_signal_pc(uc);
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/* Detect all store instructions at program counter. */
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switch ((insn >> 26) & 077) {
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case 050: /* SB */
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case 051: /* SH */
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case 052: /* SWL */
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case 053: /* SW */
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case 054: /* SDL */
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case 055: /* SDR */
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case 056: /* SWR */
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case 070: /* SC */
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case 071: /* SWC1 */
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case 074: /* SCD */
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case 075: /* SDC1 */
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case 077: /* SD */
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#if !defined(__mips_isa_rev) || __mips_isa_rev < 6
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case 072: /* SWC2 */
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case 076: /* SDC2 */
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#endif
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return true;
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case 023: /* COP1X */
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/*
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* Required in all versions of MIPS64 since
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* MIPS64r1 and subsequent versions of MIPS32r2.
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*/
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switch (insn & 077) {
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case 010: /* SWXC1 */
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case 011: /* SDXC1 */
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case 015: /* SUXC1 */
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return true;
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}
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break;
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}
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return false;
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}
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#endif
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