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Peter Maydell c43e853afe x86 and CPU queue, 2016-10-24 
x2APIC support to APIC code, cpu_exec_init() refactor on all
 architectures, and other x86 changes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYDmYyAAoJECgHk2+YTcWmoSUP/2ga+b9YmPuyL7XC+12pff0I
 Z8gdjUzbMUNcCI0JMZCTGUJbs3BapLcnsA7ypmt88s9kG02WeDMhNx1BfYiAFgLU
 kPLQlXAM7awEdGagd3sTCiFojSUZ7GxYHjd5fuhPoOAXvXM8im6zJl18ZcsnStjO
 /J8JGoGDHq1XJlz+RIjnGamojJWCiO/+iiD+rFmVSic8zjHPDYq14sIk/QJX+DaF
 azLiOI6DAlX3kyrN5ZshhIRQ3COzzUMUSDF/ZaYHjudUco5MBnwj/oLQniTq+ZUd
 hCu7dr5TpLxI7q1yltyd0UIl/+aZGbE8tEvoXAtc735iK4m2CTckT7ql6x3xI+Ir
 PmpPgIswHqfCiCXm8imLj6ZI47kRA1x4x4AudLaNVKP7jO82485sS9HWpOadYsaU
 jvek2SqfqvH+vce4FzwlLEcXGDb73MT/XkIUvd7SfPIbs9umgdZc03U4SHfAWr0i
 lAIRs4Ym0AAS2WSE4E09wvdUUr9oxaQBMhw3JAiNmg7hLfyINTP+D/IhtlAVXXEA
 F9D7fky5lDwfKvIwPxPJbDD5bCBV9AmxhiahIhv3epu4Kg4orf1inkrx0IZWSbB0
 7+JZ7j8asuizfibkeZAN9rxVwmz32makJNsnjzZHlnaPxTvIDzvRkNceBnhC5vKq
 3yfxgl4agXmMjveraAtt
 =T2kg
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging

x86 and CPU queue, 2016-10-24

x2APIC support to APIC code, cpu_exec_init() refactor on all
architectures, and other x86 changes.

# gpg: Signature made Mon 24 Oct 2016 20:51:14 BST
# gpg:                using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-pull-request:
  exec: call cpu_exec_exit() from a CPU unrealize common function
  exec: move cpu_exec_init() calls to realize functions
  exec: split cpu_exec_init()
  pc: q35: Bump max_cpus to 288
  pc: Require IRQ remapping and EIM if there could be x2APIC CPUs
  pc: Add 'etc/boot-cpus' fw_cfg file for machine with more than 255 CPUs
  Increase MAX_CPUMASK_BITS from 255 to 288
  pc: Clarify FW_CFG_MAX_CPUS usage comment
  pc: kvm_apic: Pass APIC ID depending on xAPIC/x2APIC mode
  pc: apic_common: Reset APIC ID to initial ID when switching into x2APIC mode
  pc: apic_common: Restore APIC ID to initial ID on reset
  pc: apic_common: Extend APIC ID property to 32bit
  pc: Leave max apic_id_limit only in legacy cpu hotplug code
  acpi: cphp: Force switch to modern cpu hotplug if APIC ID > 254
  pc: acpi: x2APIC support for SRAT table
  pc: acpi: x2APIC support for MADT table and _MAT method

Conflicts:
	target-arm/cpu.c

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 		2016-10-25 10:25:27 +01:00
..
Makefile.objs ARM: Factor out ARM on/off PSCI control functions 2016-05-12 13:22:28 +01:00
arch_dump.c arm: Clean up includes 2016-01-29 15:07:23 +00:00
arm-powerctl.c Use #include "..." for our own headers, <...> for others 2016-07-12 16:19:16 +02:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2016-05-12 13:22:28 +01:00
arm-semi.c target-arm/arm-semi.c: In SYS_HEAPINFO use correct type for 'limit' 2016-07-07 13:47:00 +01:00
arm_ldst.h cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
cpu-qom.h exec: move cpu_exec_init() calls to realize functions 2016-10-24 17:29:16 -02:00
cpu.c x86 and CPU queue, 2016-10-24 2016-10-25 10:25:27 +01:00
cpu.h target-arm: Implement new HLT trap for semihosting 2016-10-24 16:26:56 +01:00
cpu64.c include/qemu/osdep.h: Don't include qapi/error.h 2016-03-22 22:20:15 +01:00
crypto_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
gdbstub.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
gdbstub64.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
helper-a64.c softfloat: Implement run-time-configurable meaning of signaling NaN bit 2016-06-24 13:40:37 +01:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Implement new HLT trap for semihosting 2016-10-24 16:26:56 +01:00
helper.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2016-03-16 17:05:58 +00:00
internals.h Fix confusing argument names in some common functions 2016-07-12 13:06:08 +01:00
iwmmxt_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm-consts.h all: Clean up includes 2016-02-23 12:43:05 +00:00
kvm-stub.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
kvm.c target-arm: kvm: use AddressSpace-specific listener 2016-10-17 19:22:16 +01:00
kvm32.c os-posix: include sys/mman.h 2016-06-16 18:39:03 +02:00
kvm64.c os-posix: include sys/mman.h 2016-06-16 18:39:03 +02:00
kvm_arm.h target-arm: move gicv3_class_name from machine to kvm_arm.h 2016-10-04 13:28:08 +01:00
machine.c target-arm: move gicv3_class_name from machine to kvm_arm.h 2016-10-04 13:28:08 +01:00
monitor.c target-arm/monitor.c: Advertise emulated GICv3 in capabilities 2016-06-17 15:23:51 +01:00
neon_helper.c target-arm: Fix warn about implicit conversion 2016-08-12 11:12:24 +01:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c Fix masking of PC lower bits when doing exception returns 2016-10-17 19:29:03 +01:00
psci.c Use #include "..." for our own headers, <...> for others 2016-07-12 16:19:16 +02:00
trace-events target-arm: Add trace events for the generic timers 2016-10-17 19:32:44 +01:00
translate-a64.c target-arm: Comments added to identify cases in a switch 2016-10-17 19:22:18 +01:00
translate.c target-arm: Implement new HLT trap for semihosting 2016-10-24 16:26:56 +01:00
translate.h target-arm: Infrastucture changes to enable handling of tagged address loading into PC 2016-10-17 19:22:18 +01:00