mirror_qemu/target/sparc
Dr. David Alan Gilbert 44b1ff319c migration: pre_save return int
Modify the pre_save method on VMStateDescription to return an int
rather than void so that it potentially can fail.

Changed zillions of devices to make them return 0; the only
case I've made it return non-0 is hw/intc/s390_flic_kvm.c that already
had an error_report/return case.

Note: If you add an error exit in your pre_save you must emit
an error_report to say why.

Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20170925112917.21340-2-dgilbert@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-09-27 11:35:59 +01:00
..
Makefile.objs
TODO
asi.h target-sparc: implement UA2005 scratchpad registers 2017-01-18 22:03:44 +01:00
cc_helper.c
cpu-qom.h sparc: convert cpu models to SPARC cpu subclasses 2017-09-01 11:54:24 -03:00
cpu.c sparc: replace cpu_sparc_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
cpu.h sparc: Fix typedef clash 2017-09-14 15:00:41 +01:00
fop_helper.c
gdbstub.c
helper.c
helper.h target-sparc: implement UA2005 GL register 2017-01-18 22:03:44 +01:00
int32_helper.c sparc: embed sparc_def_t into CPUSPARCState 2017-09-01 11:54:24 -03:00
int64_helper.c sparc: embed sparc_def_t into CPUSPARCState 2017-09-01 11:54:24 -03:00
ldst_helper.c sparc: embed sparc_def_t into CPUSPARCState 2017-09-01 11:54:24 -03:00
machine.c migration: pre_save return int 2017-09-27 11:35:59 +01:00
mmu_helper.c sparc: embed sparc_def_t into CPUSPARCState 2017-09-01 11:54:24 -03:00
monitor.c monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
translate.c sparc: embed sparc_def_t into CPUSPARCState 2017-09-01 11:54:24 -03:00
vis_helper.c
win_helper.c sparc: embed sparc_def_t into CPUSPARCState 2017-09-01 11:54:24 -03:00