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Peter Maydell a4ba200894 More migration fixes and more record/replay preparations. Also moves 
the sdhci-pci device id to make space for the rocker device.
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

More migration fixes and more record/replay preparations.  Also moves
the sdhci-pci device id to make space for the rocker device.

# gpg: Signature made Sat 03 Jan 2015 08:22:36 GMT using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  pci: move REDHAT_SDHCI device ID to make room for Rocker
  block/iscsi: fix uninitialized variable
  pckbd: set bits 2-3-6-7 of the output port by default
  serial: refine serial_thr_ipending_needed
  gen-icount: check cflags instead of use_icount global
  translate: check cflags instead of use_icount global
  cpu-exec: add a new CF_USE_ICOUNT cflag
  target-ppc: pass DisasContext to SPR generator functions
  atomic: fix position of volatile qualifier

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 		2015-01-09 16:29:36 +00:00
..
Makefile.objs target-tricore: Add target stubs and qom-cpu 2014-09-01 14:49:20 +01:00
cpu-qom.h target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
cpu.c target-tricore: Make TRICORE_FEATURES implying others. 2014-12-10 11:13:45 +00:00
cpu.h target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
csfr.def target-tricore: Add instructions of RLC opcode format 2014-12-10 11:13:45 +00:00
helper.c target-tricore: Remove the dummy interrupt boilerplate 2014-09-25 18:54:22 +01:00
helper.h target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode 2014-12-21 18:35:49 +00:00
op_helper.c target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode 2014-12-21 18:35:49 +00:00
translate.c More migration fixes and more record/replay preparations. Also moves 2015-01-09 16:29:36 +00:00
tricore-defs.h target-tricore: Add target stubs and qom-cpu 2014-09-01 14:49:20 +01:00
tricore-opcodes.h target-tricore: Fix MFCR/MTCR insn and B format offset. 2014-12-21 18:35:38 +00:00